ADL5382

Rev. 0 | Page 6 of 28

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

1

24

CMRF CMRF RFIP

ADL5382

TOP VIEW

(Not to Scale)

RFIN CMRF VPX

CML

VPA

COM

BIAS

VPL

VPL

VPL

VPB

VPB

QHI

QLO

IHI

ILO

LOIP LOIN CML

CML COM

23

22

21

20

19

7

8

9

101112

2

3

4

5

6

18

17

16

15

14

13

Figure 2. Pin Configuration

Table 3. Pin Function Descriptions

Pin No.

Mnemonic

Description

1, 4 to 6,

17 to 19

VPA, VPL, VPB, VPX

Supply. Positive supply for LO, IF, biasing, and baseband sections. These pins should be decoupled

to the board ground using appropriate-sized capacitors.

2, 7, 10 to 12,

20, 23, 24

COM, CML, CMRF

Ground. Connect to a low impedance ground plane.

3

BIAS

current. The default setting for this pin is open.

8, 9

LOIP, LOIN

Local Oscillator Input. Pins must be ac-coupled. A differential drive through a balun (recommended

balun is the M/A-COM ETC1-1-13) is necessary to achieve optimal performance.

13 to 16

ILO, IHI, QLO, QHI

I Channel and Q Channel Mixer Baseband Outputs. These outputs have a 50 Ω differential output

impedance (25 Ω per pin). The bias level on these pins is equal to VPOS − 2.8 V. Each output pair can

swing 2 V p-p (differential) into a load of 200 Ω. Output 3 dB bandwidth is 370 MHz.

21, 22

RFIN, RFIP

RF Input. A single-ended 50 Ω signal can be applied to the RF inputs through a 1:1 balun (recommended

balun is the M/A-COM ETC1-1-13). Ground-referenced inductors must also be connected to RFIP and

RFIN (recommended values = 33 nH).

EP

Exposed Paddle. Connect to a low impedance thermal and electrical ground plane.