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GD32H757VMT7 数据表(PDF) 110 Page - GigaDevice Semiconductor (Beijing) Inc. |
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GD32H757VMT7 数据表(HTML) 110 Page - GigaDevice Semiconductor (Beijing) Inc. |
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110 / 151 page  GD32H757xx Datasheet 109 Equation 1: RAIN max formula RAIN < Ts fADC∗CADC∗ln(2N+2) − RADC The formula above Equation 1 is used to determine the maximum external impedance allowed for an error below 1/4 of LSB. Here N = 14 (from 14-bit resolution). Table 4-33. ADC RAIN max for fADC = 72 MHz (14-bit ADC) (1)(2) Resolution Sampling cycles @ 72 MHz RAIN max (kΩ) 14 bits 3.5 0.21 6.5 0.52 12.5 1.15 24.5 2.40 47.5 4.80 92.5 9.50 247.5 25.6 810.5 84.4 12 bits 3.5 0.26 6.5 0.62 12.5 1.34 24.5 2.77 47.5 5.51 92.5 10.8 247.5 29.3 810.5 96.5 10 bits 3.5 0.33 6.5 0.75 12.5 1.58 24.5 3.25 47.5 6.45 92.5 12.7 247.5 34.2 810.5 112 8 bits 3.5 0.43 6.5 0.93 12.5 1.93 24.5 3.94 47.5 7.78 92.5 15.2 247.5 41.1 810.5 135 (1) Value guaranteed by design, not 100% tested in production. (2) The RAIN value was calculated by theory and stray capacitance of actual pcb has not been taken into account. |
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