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STM32L4P5CEU6P 数据表(PDF) 276 Page - STMicroelectronics |
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STM32L4P5CEU6P 数据表(HTML) 276 Page - STMicroelectronics |
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276 / 311 page  Electrical characteristics STM32L4P5xx 276/311 DS12903 Rev 2 See the different SDMMC diagrams in Figure 69, Figure 70 and Figure 71 below. Figure 69. SDIO high-speed mode Table 123. Dynamics characteristics: eMMC characteristics at VDD = 1.71 V to 1.9 V(1)(2) 1. Guaranteed by characterization results. 2. Cload = 20 pF. Symbol Parameter Conditions Min Typ Max Unit fPP Clock frequency in data transfer mode -0 - 52 MHz - SDIO_CK/fPCLK2 frequency ratio -- - 8/3 - tW(CKL) Clock low time fpp = 52 MHz 8.5 9.5 - ns tW(CKH) Clock high time fpp = 52 MHz 8.5 9.5 - CMD, D inputs (referenced to CK) in eMMC mode tISU Input setup time HS - 0.5 - - ns tIH Input hold time HS - 4.5 - - CMD, D outputs (referenced to CK) in eMMC mode tOV Output valid time HS - - 6 7.3 ns tOH Output hold time HS - 4 - - |
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