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STM32L4P5CEU6P 数据表(PDF) 274 Page - STMicroelectronics |
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STM32L4P5CEU6P 数据表(HTML) 274 Page - STMicroelectronics |
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274 / 311 page ![]() Electrical characteristics STM32L4P5xx 274/311 DS12903 Rev 2 6.3.32 LCD-TFT controller (LTDC) characteristics Unless otherwise specified, the parameters given in Table 121 for LCD-TFT are derived from tests performed under the ambient temperature, fHCLK frequency and VDD supply voltage summarized in Table 21, with the following configuration: • LCD_CLK polarity: high • LCD_DE polarity: low • LCD_VSYNC and LCD_HSYNC polarity: high • Pixel formats: 24 bits • Output speed is set to OSPEEDRy[1:0] = 11 • Capacitive load C = 30 pF • Measurement points are done at CMOS levels: 0.5 x VDD Refer to Section 6.3.14: I/O port characteristics for more details on the input/output alternate function characteristics. Table 121. LTDC characteristics(1) 1. Guaranteed by characterization results. Symbol Parameter Conditions Min Max Unit fCLK DCLK LTDC clock output frequency 2.7 V < VDD < 3.6 V - 83 MHz 1.71 V < VDD < 3.6 V - 50 LTDC clock output duty cycle -45 55 % tw(CLKH) tw(CLKL) Clock high time Clock low time - tw(CLK)/2-0.5 tw(CLK)/2+0.5 ns tv(DATA) Data output valid time - - 5.5 th(DATA) Data output hold time - 1 - tv(HSYNC) tv(VSYNC) tv(DE) HSYNC/VSYNC/DE output valid time -- 3 th(HSYNC) th(VSYNC) th(DE) HSYNC/VSYNC/DE output hold time -1 - |
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