STA8135G datasheet(21/41 Pages) STMICROELECTRONICS

21 / 41 page

Specification

Min. Typ. Max. Unit

Comment

Line regulation

Load regulation

VO = 1.2 V max at Iout = 0 mA

VO = 1.1 V max at Iout = 2 mA

100

Start-up time (1)

600

μs

VBK_IN slew rate

0.04

40 (1) ms

In case VBK_IN = 3.3 V add 100 Ω series resistor and

1 μF capacitor to GND to the VBK_IN pin

1. Specified by design, not tested in production.

Table 17. Main PMU - Functional specifications

Specification

Min.

Typ.

Max.

Unit

Comment

LDO_CORE

Input voltage (VCORE_IN)

1.62

3.3

3.6

Output voltage

(VCORE_OUT available at balls VDD_EXT_REG)

1.14

1.2

1.30

EXT_REG_SEL = low

(VDD_EXT_REG)

Load current (mA)

450

LDO power consumption (1)

200

μA

LDO power down consumption(1)

μA

External capacitance (VCORE_OUT) (1)

2.35

4.7

6.35

μF

EXT_REG_SEL = low

(VDD_EXT_REG)

Line regulation

Load regulation

Load current transient (1)

150/100

mA/nS

Start-up time (1)

μs

LDO IO

Input voltage (VIO2_IN)

3.3

3.6

Output voltage (VIO1_EXT)

1.72

1.80

1.90

Load current

LDO power consumption (1)

200

μA

LDO power down consumption (1)

μA

External capacitance (1)

1.1

2.2

μF

Line regulation

Load regulation

100

Load current transient (1)

90/100

mA/ns

Start-up time(1)

μs

LDO_RF

VRF_IN

1.62

3.3

3.6

VRF_OUT

1.05

1.15

1.25

Load current on VRF_OUT

1. Specified by design, not tested in production.

STA8135G

Electrical specifications

DS14788 - Rev 1

page 21/41

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