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SN0400ALK-DC 数据表(PDF) 29 Page - Texas Instruments |
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SN0400ALK-DC 数据表(HTML) 29 Page - Texas Instruments |
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29 / 126 page  4.12 Typical Characteristics 4.12.1 TX Typical Characteristics 800MHz Typical values at TA = +25°C with nominal supplies. Default conditions: TX input data rate = 491.52MSPS, fDAC = 11796.48MSPS (24x interpolation), interleave mode, 1st Nyquist zone output, PLL clock mode with fREF = 491.52MHz, AOUT = –1dBFS, DSA = 0dB, Sin(x)/x enabled, DSA calibrated Output Frequency (MHz) 600 750 900 1050 1200 1350 1500 -2 -1 0 1 2 3 4 5 6 7 fDAC=5898.24MSPS, straight mode fDAC=5898.24MSPS, interleave mode fDAC=8847.36MSPS, straight mode fDAC=8847.36MSPS, interleave mode fDAC=11796.48MSPS, straight mode fDAC=11796.48MSPS, interleave mode including PCB and cable losses, Aout = -0.5dFBS, DSA = 0, 0.8GHz matching Figure 4-1. TX Output Fullscale vs Output Frequency Temperature (Cq) -40 -15 10 35 60 85 105 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5 fdac=5898.24MSPS, straight mode fdac=5898.24MSPS, interleaved mode fdac=8847.36MSPS, straight mode fdac=8847.36MSPS, interleaved mode fdac=11796.48MSPS, interleaved mode including PCB and cable losses, Aout = -0.5dFBS, DSA = 0, 0.8GHz matching Figure 4-2. TX Output Fullscale vs Temperature DSA (dB) 0 5 10 15 20 25 30 35 40 -35 -30 -25 -20 -15 -10 -5 0 5 1TX 2TX 3TX 4TX fDAC = 11796.48MSPS, interleave mode, Aout = -0.5dFBS, matching 0.8GHz Figure 4-3. TX Output Power vs DSA Setting and Channel at 0.85GHz DSA (dB) 0 4 8 12 16 20 24 28 32 36 40 -0.05 -0.04 -0.03 -0.02 -0.01 0 0.01 0.02 0.03 0.04 0.05 1TX 2TX 3TX 4TX fDAC = 5898.24MSPS, interleave mode, matching at 0.8GHz Differential Gain Error = POUT(DSA Setting – 1) – POUT(DSA Setting) + 1 Figure 4-4. TX Uncalibrated Differential Gain Error vs DSA Setting and Channel at 0.85GHz DSA (dB) 0 4 8 12 16 20 24 28 32 36 40 -0.05 -0.04 -0.03 -0.02 -0.01 0 0.01 0.02 0.03 0.04 0.05 1TX 2TX 3TX 4TX fDAC = 5898.24MSPS, interleave mode, matching at 0.8GHz Differential Gain Error = POUT(DSA Setting – 1) – POUT(DSA Setting) + 1 Figure 4-5. TX Calibrated Differential Gain Error vs DSA Setting and Channel at 0.85GHz DSA (dB) 0 4 8 12 16 20 24 28 32 36 40 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 1TX 2TX 3TX 4TX fDAC = 5898.24MSPS, interleave mode, matching at 0.8GHz Integrated Gain Error = POUT(DSA Setting ) – POUT(DSA Setting = 0) + DSA Settings Figure 4-6. TX Uncalibrated Integrated Gain Error vs DSA Setting and Channel at 0.85GHz www.ti.com AFE7950-SP SBASAG7A – MARCH 2024 – REVISED AUGUST 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 29 Product Folder Links: AFE7950-SP |
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