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STM32L462CEU6 数据表(PDF) 65 Page - STMicroelectronics

部件名 STM32L462CEU6
功能描述  Ultra-low-power ARM® Cortex®-M4 32-bit MCUFPU, 100DMIPS, 512KB Flash, 160KB SRAM, analog, audio, AES
PDF  198 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STM32L462CEU6 数据表(HTML) 65 Page - STMicroelectronics

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STM32L462CE STM32L462RE STM32L462VE
Pinouts and pin description
80
41 C5 57 C4 91
C5
PB5
I/O
FT
-
LPTIM1_IN1, TIM3_CH2,
CAN1_RX, I2C1_SMBA,
SPI1_MOSI, SPI3_MOSI,
USART1_CK,
TSC_G2_IO2,
COMP2_OUT, SAI1_SD_B,
TIM16_BKIN, EVENTOUT
-
42 B5 58 D3 92
B5
PB6
I/O
FT_fa
-
LPTIM1_ETR, I2C1_SCL,
I2C4_SCL, USART1_TX,
CAN1_TX, TSC_G2_IO3,
SAI1_FS_B, TIM16_CH1N,
EVENTOUT
COMP2_INP
43 A5 59 C3 93
B4
PB7
I/O
FT_fa
-
LPTIM1_IN2, I2C1_SDA,
I2C4_SDA, USART1_RX,
UART4_CTS,
TSC_G2_IO4, EVENTOUT
COMP2_INM, PVD_IN
44 B6 60 B4 94
A4
PH3-
BOOT0
(BOOT0)
I/O
-
-
EVENTOUT
BOOT0
45 A6 61 B3 95
A3
PB8
I/O
FT_f
-
I2C1_SCL, CAN1_RX,
SDMMC1_D4,
SAI1_MCLK_A,
TIM16_CH1, EVENTOUT
-
46 C6 62 A3 96
B3
PB9
I/O
FT_f
-
IR_OUT, I2C1_SDA,
SPI2_NSS, CAN1_TX,
SDMMC1_D5, SAI1_FS_A,
EVENTOUT
-
----
97
C3
PE0
I/O
FT
-
TIM16_CH1, EVENTOUT
-
----
98
A2
PE1
I/O
FT
-
EVENTOUT
-
47 A7 63 D4 99
D3
VSS
S
-
-
-
-
48 A8 64 E4 100 C4
VDD
S
-
-
-
-
1. PC13, PC14 and PC15 are supplied through the power switch. Since the switch only sinks a limited amount of current
(3 mA), the use of GPIOs PC13 to PC15 in output mode is limited:
- The speed should not exceed 2 MHz with a maximum load of 30 pF
- These GPIOs must not be used as current sources (e.g. to drive an LED).
2. After a Backup domain power-up, PC13, PC14 and PC15 operate as GPIOs. Their function then depends on the content of
the RTC registers which are not reset by the system reset. For details on how to manage these GPIOs, refer to the Backup
domain and RTC register descriptions in the RM0394 reference manual.
3. OPAMPx_VINM pins are not available as additional functions on pins PA1 and PA7 on UFBGA packages. On UFBGA
packages, use the OPAMPx_VINM dedicated pins available on M3 and M4 balls.
4. After reset, these pins are configured as JTAG/SW debug alternate functions, and the internal pull-up on PA15, PA13, PB4
pins and the internal pull-down on PA14 pin are activated.
Table 13. STM32L462xx pin definitions (continued)
Pin Number
Pin name
(function
after
reset)
Pin functions
Alternate functions
Additional functions



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