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STM32L462CEU6 数据表(PDF) 172 Page - STMicroelectronics |
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STM32L462CEU6 数据表(HTML) 172 Page - STMicroelectronics |
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172 / 198 page  Electrical characteristics STM32L462CE STM32L462RE STM32L462VE 172/198 DocID029969 Rev 1 Figure 36. SAI slave timing waveforms SDMMC characteristics Unless otherwise specified, the parameters given in Table 85 for SDIO are derived from tests performed under the ambient temperature, fPCLKx frequency and VDD supply voltage conditions summarized in Table 20: General operating conditions, with the following configuration: • Output speed is set to OSPEEDRy[1:0] = 11 • Capacitive load C = 30 pF • Measurement points are done at CMOS levels: 0.5 ₓ VDD Refer to Section 6.3.14: I/O port characteristics for more details on the input/output characteristics. Table 85. SD / MMC dynamic characteristics, VDD=2.7 V to 3.6 V(1) Symbol Parameter Conditions Min Typ Max Unit fPP Clock frequency in data transfer mode - 0 - 50 MHz - SDIO_CK/fPCLK2 frequency ratio - - - 4/3 - tW(CKL) Clock low time fPP = 50 MHz 8 10 - ns tW(CKH) Clock high time fPP = 50 MHz 8 10 - ns CMD, D inputs (referenced to CK) in MMC and SD HS mode tISU Input setup time HS fPP = 50 MHz 3.5 - - ns tIH Input hold time HS fPP = 50 MHz 2.5 - - ns CMD, D outputs (referenced to CK) in MMC and SD HS mode tOV Output valid time HS fPP = 50 MHz - 12 13 ns tOH Output hold time HS fPP = 50 MHz 10 - - ns CMD, D inputs (referenced to CK) in SD default mode tISUD Input setup time SD fPP = 50 MHz 3.5 - - ns tIHD Input hold time SD fPP = 50 MHz 3 - - ns |
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