M25P05-AVMP6TP datasheet(50/52 Pages) NUMONYX

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Revision history

M25P05-A

50/52

Revision history

Table 23.

Document revision history

Date

Revision

Changes

25-Feb-2001

1.0

Initial release.

11-Apr-2002

1.1

Clarification of descriptions of entering Standby Power mode from Deep

Power-down mode, and of terminating an instruction sequence or data-

out sequence.

12-Sep-2002

1.2

VFQFPN8 package (MLP8) added.

13-Dec-2002

1.3

Typical Page Program time improved. Write Protect setup and hold times

specified, for applications that switch Write Protect to exit the Hardware

Protection mode immediately before a WRSR, and to enter the Hardware

Protection mode again immediately after.

24-Nov-2003

Table of contents, warning about exposed paddle on MLP8, and Pb-free

options added.

40 MHz AC characteristics table included as well as 25 MHz. ICC3(max),

tSE(typ) and tBE(typ) values improved. Change of naming for VDFPN8

package

13-Jan-2005

Devices with process technology code X added (Read identification

(RDID) and Table 17: AC characteristics (50 MHz operation)) added.

TSSOP8 package added.

Notes 1 and 2 removed from Table 22: Ordering information scheme and

Note 1 added.

Note 1 to Table 9: Absolute maximum ratings changed, note 2 and TLEAD

values removed.

Small text changes.

01-Apr-2005

Frequency test condition modified for ICC3 in Table 13: DC characteristics.

Read identification (RDID), Deep power-down (DP) and Release from

deep power-down and read electronic signature (RES) instructions and

Active power, standby power and deep power-down modes paragraph

clarified.

SO8 package specifications updated (see Figure 26. and Table 18).

01-Aug-2005

Updated Page Program (PP) instructions in Page programming, Page

program (PP) and Instruction times.

06-Jul-2006

Packages are fully ECOPACK® compliant. SO8N and VFQFPN8 package

specifications updated (see Section 11: Package mechanical).

Figure 3: Bus master and memory devices on the SPI bus updated and

Note 2 added. TLEAD removed from Section Table 9.: Absolute maximum

ratings. Small text changes.

19-Dec-2006

VCC supply voltage and VSS ground descriptions added. Figure 3: Bus

master and memory devices on the SPI bus updated, note 2 removed

replaced by explanatory paragraph.

WIP bit behavior at power-up specified in Section 7: Power-up and power-

down. TLEAD added and VIO max modified in Table 9: Absolute maximum

ratings. VFQFPN8 and SO8N packages updated (see Section 11:

Package mechanical).

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