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AT45DB321E 数据表(PDF) 39 Page - Renesas Technology Corp

部件名 AT45DB321E
功能描述  32-Mbit DataFlash (with Extra 1-Mbits), 2.3 V Minimum SPI Serial Flash Memory
PDF  80 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

AT45DB321E 数据表(HTML) 39 Page - Renesas Technology Corp

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DS-AT45DB321E-8784 Rev. N
Page 39
9/1/23
© 2023 Renesas Electronics
AT45DB321E Datasheet
a buffer and then program the data from the buffer back into same page of main memory. The operation is
internally self-timed and takes place in a maximum time of tEP. During this time, the RDY/BUSY Status Register
indicates that the part is busy.
If a sector is programmed or reprogrammed sequentially page by page and the possibility does not exist that there
is going to be a page or pages of static data, then the programming algorithm shown in Figure 50 is
recommended. Otherwise, if there is a chance that there could be a page or pages of a sector that contains static
data, then the programming algorithm shown in Figure 51 is recommended.
Contact Renesas Electronics for availability of devices that are specified to exceed the 50,000 cycle cumulative
limit.
9.4
Status Register Read
The 2-byte Status Register can be used to determine the device's ready/busy status, page size, a Main Memory
Page to Buffer Compare operation result, the sector protection status, Freeze Sector Lockdown status,
erase/program error status, Program/Erase Suspend status, and the device density. The Status Register can be
read at any time, including during an internally self-timed program or erase operation.
To read the Status Register, the CS pin must first be asserted and then the opcode D7h must be clocked into the
device. After the opcode has been clocked in, the device begins outputting Status Register data on the SO pin
during every subsequent clock cycle. After the second byte of the Status Register has been clocked out, the
sequence repeats itself, starting again with the first byte of the Status Register, as long as the CS pin remains
asserted and the clock pin is being pulsed. The data in the Status Register is constantly being updated, so each
repeating sequence might output new data. The RDY/BUSY status is available for both bytes of the Status
Register and is updated for each byte.
Deasserting the CS pin terminates the Status Register Read operation and put the SO pin into a high-impedance
state. The CS pin can be deasserted at any time and does not require that a full byte of data be read.
Table 20. Status Register Format – Byte 1
1. R = Readable only.
Bit
Name
Type1
Description
7RDY/BUSY Ready/Busy Status
R
0
Device is busy with an internal operation.
1
Device is ready.
6
COMP
Compare Result
R
0
Main memory page data matches buffer data.
1
Main memory page data does not match buffer data.
5:2
DENSITY
Density Code
R
1101 32-Mbit
1
PROTECT
Sector Protection Status
R
0
Sector protection is disabled.
1
Sector protection is enabled.
0
PAGE SIZE Page Size Configuration
R
0
Device is configured for standard DataFlash page size (528 bytes).
1
Device is configured for “power of 2” binary page size (512 bytes).



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