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VIPER31SP 数据表(PDF) 3 Page - STMicroelectronics

部件名 VIPER31SP
功能描述  BATTERY CHARGER PRIMARY I.C.
PDF  16 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

VIPER31SP 数据表(HTML) 3 Page - STMicroelectronics

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PINS FUNCTIONAL DESCRIPTION
DRAIN PIN:
Integrated power MOSFET drain pin. It provides
internal bias current during start-up via an
integrated high voltage current source which is
switched off during normal operation. The device
is able to handle an unclamped current during its
normal operation, assuring self protection against
voltage surges, PCB stray inductance, and
allowing a snubberless operation for low output
power.
SOURCE PIN:
Integrated power MOSFET source pin. To be
connected to an external current sense resistance
which defines the output current value.
GND
Used as the signal reference for all low level
signals. To be connected to the cold point of the
current sense resistance.
VDD PIN:
It corresponds to the low voltage supply of the
control part of the circuit. If Vdd goes below 6V,
the circuit is shut down and the start-up current
source is activated. The circuit resumes normal
operation when the VDD voltage reaches 8V. An
internal low drop linear regulator generates the
VDD voltage from the VCC one, thus limiting its
value at 10V.
VCC PIN:
This pin receives the auxiliary unregulated
voltage from the main transformer, which can
range from 7V up to 27V during normal operation.
It delivers a start up current of 1.5mA during the
shut down phase. The VCC pin is also connected
to an internal 10V low drop regulator which
provides the VDD voltage.
CSENSE PIN:
Receives the voltage of the current sense
resistor, representative from the power MOSFET
drain current.
CREF PIN:
Serves as a reference for the peak power
MOSFET drain current. It is also the output of the
curent regulation function, which adjusts this
reference voltage to keep the average output
current constant. To be connected to an external
filtering capacitor.
DSENSE PIN:
Detects the full demagnetisation of the main
transformer, in
order
to
drive
the
current
regulation function. Refer to the application part
for further details. It is also used to prevent any
new turn on of the power MOSFET during the
demagnetisation phase.
FB PIN:
This is the inverting input of the voltage mode
error amplifier. This error amplifier is in charge of
the limitation of the VCC voltage when the output
current is lower than the nominal regulated one.
COMP PIN:
This is the output of the voltage mode error
amplifier. An external R-C network connected
between this pin and the FB pin defines the
bandwidth of the voltage regulation loop, and
insures the stability of the converter.
OSC PIN:
An RT-CT network must be connected on that pin
to define the switching frequency. Note that
despite the connection of RT to VDD,no
significant frequency change occurs for VDD
varying from 7V to 10V. It provides also a
synchronisation capability, when connected to an
external frequency source.
CONNECTION DIAGRAMS (top View)
VIPer31SP
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