Mode

E

G

P

A9

Q0 - Q15

Read

Data Out

Output Disable

XX

Hi-Z

Program

X

Data In

Verify

Data Out

Program Inhibit

XX

X

Hi-Z

Standby

XX

X

Hi-Z

Electronic Signature

Codes

± 0.5V

Table 3. Operating Modes

Identifier

A0

Q7

Q6

Q5

Q4

Q3

Q2

Q1

Q0

Hex Data

Manufacturer’s Code

00

1000

00

20h

Device Code

00

0011

11

0Fh

Note: Outputs Q8-Q15 are set to ’0’.

Table 4. Electronic Signature

DEVICE OPERATION

The operating modes of the M27C516 are listed in

the Operating Modes table. A single power supply

is required in the read mode. All inputs are TTL

levels except for G and 12V on A9 for Electronic

Signature.

Read Mode

The M27C516 has two control functions, both of

which must be logically active in order to obtain

data at the outputs. Chip Enable (E) is the power

control and should be used for device selection.

Output Enable (G) is the output control and should

be used to gate data to the output pins, inde-

pendent of device selection. Assuming that the

addresses are stable, the address access time

from the falling edge of G, assuming that E has

been low and the addresses have been stable for

Standby Mode

The M27C516 has a standby mode which reduces

the supply current from 30mA to 100

µA. The

M27C516 is placed in the standby mode by apply-

ing a CMOS high signal to the E input. When in the

standbymode, the outputs are in a high impedance

state, independent of the G input.

Two Line Output Control

Because OTP EPROMs are usually used in larger

memory arrays, the product featuresa 2 line control

function which accommodates the use of multiple

memory connection. The two line control function

allows:

a. the lowest possible memory power dissipation,

b. complete assurance that output bus contention

will not occur.

For the most efficient use of these two control lines,

E should be decoded and used as the primary

device selecting function, while G should be made

a common connection to all devices in the array

and connected to the READ line from the system

control bus. This ensures that all deselected mem-

ory devices are in their low power standby mode

and that the output pins are only active when data

is required from a particular memory device.

3/12

M27C516