SAP51D-B-G1-R datasheet(48/67 Pages) RENESAS

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SAP51 / SAP5S Datasheet

January 28, 2016

Table 5.23 Example for Cryptographic Code Table

Note: an asterisk (*) is used to indicate bits that have changed from the original bit.

Reference Code Table

Step 1:

Cycle D0/D2

by One Cycle

Step 2:

Invert D0/D2

Step 3: Swap D1 – D3

Code Table Written to the EEPROM

D2*

D0*

D3*

D2*

D1*

D0*

swap_flag

The EEPROM code table must be derived from a Reference Code Table that meets the following requirements:

Looking up in the Reference Code Table, the data bit vectors D0 and D2 are scrolled forward by one

cycle. Refer to Table 5.23 for an example.

Data bit vectors D0 and D2 are inverted and stored as D0* and D2* in the EEPROM.

Four out of eight data bits from the vector D1 are interchanged with the respective data bits from vector

D3. The respective bits are marked with swap_flag = ‘1’. Unchanged data bit pairs are marked with

swap_flag = ‘0’. Coded in such a way, the vectors are stored as D1* and D3* in the EEPROM.

The additional swap_flag attached to each data word is stored in the EEPROM as well.

Running in Safety Mode, the EEPROM data bits D0* and D2* are put out at the port D1/D3 or P1/P3, respectively

(for port configuration, refer to Table 5.15). An external circuit must invert these signals, which adds a voltage

offset (refer to Figure 5.8) and delays it for about 20

µs. Thus the data actually will be transmitted with the

subsequent AS-i cycle. Furthermore, the safety-related switches are connected between the external circuitry and

the SAP5 safety inputs F-D0* and F-D2* (refer to Figure 5.7).

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