M27W400

2/15

Figure 2A. DIP Connections

Q0

Q8

Q1

Q11

A2

VSS

A1

A0

A14

Q15A–1

A15

A16

Q14

A13

BYTEVPP

VSS

Q7

Q12

Q10

Q9

VCC

G

Q4

Q6

A10

A9

E

A3

A17

A8

A6

AI03097

M27W400

8

1

2

3

4

5

6

7

9

10

11

12

13

14

15

16

32

31

30

29

28

27

26

25

24

23

22

21

20

19

18

17

Q3

Q2

A5

A4

Q13

Q5

40

39

38

37

36

35

34

33

A12

A11

A7

Table 1. Signal Names

A0-A17

Address Inputs

Q0-Q7

Data Outputs

Q8-Q14

Data Outputs

Q15A–1

Data Output / Address Input

E

Chip Enable

G

Output Enable

Byte Mode / Program Supply

Supply Voltage

Ground

Figure 2B. LCC Connections

AI03604

A14

Q7

23

Q0

Q8

Q1

A4

A0

E

VSS

A3

A2

12

A16

1

BYTEVPP

A13

Q6

44

M27W400

A12

VSS

Q14

34

A1

A15

Q15A–1

G

DEVICE OPERATION

The operating modes of the M27W400 are listed in

the Operating Modes Table. A single power supply

is required in the read mode. All inputs are TTL

Electronic Signature.

Read Mode

The M27W400 has two organisations, Word-wide

and Byte-wide. The organisation is selected by the

and the Q15A–1 pin is used for Q15 Data Output.

ganisation is selected and the Q15A–1 pin is used

for the Address Input A–1. When the memory is

logically regarded as 16 bit wide, but read in the

lower 8 bits of the 16 bit data are selected and with

selected.