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M27W400

Symbol

Parameter

Test Condition

Min

Max

Unit

Input Leakage Current

0V

±1

µA

Output Leakage Current

0V

±10

µA

Supply Current

20

mA

15

mA

Supply Current (Standby) TTL

1mA

Supply Current (Standby) CMOS

15

µA

Program Current

10

µA

Input Low Voltage

–0.6

V

(2)

Input High Voltage

V

Output Low Voltage

0.4

V

Output High Voltage TTL

2.4

V

Two Line Output Control

Because EPROMs are usually used in larger

memory arrays, this product features a 2-line con-

trol function which accommodates the use of mul-

tiple memory connection. The two-line control

function allows:

a. the lowest possible memory power dissipation

b. complete assurance that output bus contention

will not occur.

For the most efficient use of these two control

lines, E should be decoded and used as the prima-

ry device selecting function, while G should be

made a common connection to all devices in the

array and connected to the READ line from the

system control bus. This ensures that all deselect-

ed memory devices are in their low power standby

mode and that the output pins are only active

when data is required from a particular memory

device.

System Considerations

The power switching characteristics of Advanced

CMOS EPROMs require careful decoupling of the

has three segments of importance to the system

designer: the standby current, the active current

and the transient peaks that are produced by the

falling and rising edges of E. The magnitude of the

transient current peaks is dependent on the ca-

pacitive and inductive loading of the device out-

puts. The associated transient voltage peaks can

be suppressed by complying with the two line out-

put control and by properly selected decoupling

capacitors. It is recommended that a 0.1µF ceram-

low inherent inductance and should be placed as

close as possible to the device. In addition, a

4.7µF electrolytic capacitor should be used be-

capacitor should be mounted near the power sup-

ply connection point. The purpose of this capacitor

is to overcome the voltage drop caused by the in-

ductive effects of PCB traces.