AP40N02DF

20V N-Channel Enhancement Mode MOSFET

AP40N02DF REV1.0

永源微電子科技有限公司

Electrical Characteristics (TJ=25℃, unless otherwise noted)

Symbol

Parameter

Condition

Min

Typ

Max

Unit

BVDSS

Drain-Source Breakdown Voltage

VGS=0V ID=250μA

20

22

-

V

IDSS

Zero Gate Voltage Drain Current

VDS=20V,VGS=0V

-

-

1

μA

IGSS

Gate-Body Leakage Current

VGS=±12V,VDS=0V

-

-

±100

nA

VGS(th)

Gate Threshold Voltage

VDS=VGS,ID=250μA

0.5

0.65

1.2

V

RDS(ON)

Drain-Source On-State Resistance

VGS=4.5V, ID=6A

-

7.0

9.0

mΩ

RDS(ON)

Drain-Source On-State Resistance

VGS=2.5V, ID=5A

-

9.3

12

mΩ

gFS

Forward Transconductance

VDS=5V,ID=20A

10

-

-

S

Clss

Input Capacitance

VDS=10V,VGS=0V,

F=1.0MHz

625

PF

Coss

Output Capacitance

162

PF

Crss

Reverse Transfer Capacitance

105

PF

td(on)

Turn-on Delay Time

VGS=10V,VDS=10V

RL=0. 5Ω,RGEN=3Ω

-

4.5

-

nS

tr

Turn-on Rise Time

-

9.2

-

nS

td(off)

Turn-Off Delay Time

-

18.7

-

nS

tf

Turn-Off Fall Time

-

3.3

-

nS

Qg

Total Gate Charge

VGS=10V,VDS=10V,ID=20A

15

nC

Qgs

Gate-Source Charge

1.8

nC

Qgd

Gate-Drain Charge

2.8

nC

VSD

Diode Forward Voltage (Note 3)

VGS=0V,IS=25A

-

-

1.2

V

IS

Diode Forward Current (Note 2)

-

-

25

A

trr

Reverse Recovery Time

TJ = 25°C, IF = 20A di/dt =

100A/μs

-

18

-

nS

Qrr

Reverse Recovery Charge

-

9.5

-

nC

ton

Forward Turn-On Time

Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

Note :

1、The data tested by surface mounted on a 1 inch2 FR-4 board with 2OZ copper.

2、The data tested by pulsed , pulse width

≦ 300us , duty cycle ≦ 2%

3、The power dissipation is limited by 150

℃ junction temperature

4、The data is theoretically the same as ID and IDM , in real applications , should be limited by total power dissipation.