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M28C16A 数据表(PDF) 8 Page - STMicroelectronics |
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M28C16A 数据表(HTML) 8 Page - STMicroelectronics |
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8 / 19 page ![]() AI01511B VALID tAVQV tAXQX tGLQV tEHQZ tGHQZ DATA OUT A0-A10 E G DQ0-DQ7 tELQV Hi-Z Figure 7. Read Mode AC Waveforms Toggle bit (DQ6). The M28C16A/17A offers an- other way for determining when the internal write cycle is completed. During the internal Erase/Write cycle, DQ6 will toggle from ”0” to ”1” and ”1” to ”0” (the first read value is ”0”) on subsequentattempts to read any address in the memory. When the internalcycle is completed the togglingwill stopand the device will be accessible for a new Read or Write operation. Page Load Timer Status bit (DQ5). In the Page Write mode data may be latched by E or W up to tWHWH after the previous byte. Up to 32 bytes may be input. The Data output (DQ5) indicates the status of the internal Page Load Timer. DQ5 may be read by asserting Output Enable Low (tPLTS). DQ5 Low indicates the timer is running, High Note: Write Enable (W) = High 8/19 M28C16A, M28C17A |
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