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M28C16B 数据表(PDF) 4 Page - STMicroelectronics |
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M28C16B 数据表(HTML) 4 Page - STMicroelectronics |
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4 / 17 page ![]() M28C16B, M28C17B 4/17 Table 3. Operating Modes 1 Note: 1. 0= VIL; 1=VIH; X = VIH or VIL; V=12V ± 5%. Mode E G W DQ0-DQ7 Stand-by 1 X X Hi-Z Output Disable X 1 X Hi-Z Write Disable X X 1 Hi-Z Read 0 0 1 Data Out Write 0 1 0 Data In Chip Erase 0 V 0 Hi-Z end of the cycle can be detected by reading the status of the Data Polling and the Toggle Bit func- tions on DQ7 and DQ6. Page Write The Page Write mode allows up to 64 bytes to be written on a single page in a single go. This is achieved through a series of successive Write op- erations, no two of which are separated by more than the tWLQ5H value (as specified in Table 10A). The page write can be initiated during any byte write operation. Following the first byte write in- struction the host may send another address and data with a minimum data transfer rate of: 1/tWLQ5H. The internal write cycle can start at any instant af- ter tWLQ5H. Once initiated, the write operation is in- ternally timed, and continues, uninterrupted, until completion. All bytes must be located on the same page ad- dress (A10-A6 must be the same for all bytes). Otherwise, the Page Write operation is not execut- ed. As with the single byte Write operation, described above, the DQ5, DQ6 and DQ7 lines can be used to detect the beginning and end of the internally controlled phase of the Page Write cycle. Software Data Protection (SDP) The device offers a software-controlled write-pro- tection mechanism that allows the user to inhibit all write operations to the device. This can be useful for protecting the memory from inadvertent write cycles that may occur during periods of instability (uncontrolled bus conditions when excessive noise is detected, or when power supply levels are outside their specified values). By default, the device is shipped in the “unprotect- ed” state: the memory contents can be freely changed by the user. Once the Software Data Pro- tection Mode is enabled, all write commands are Table 4A. Power-Up Timing1 for M28CxxB (5V range) (TA = 0 to 70 °C or -40 to 85 °C; VCC = 4.5 to 5.5 V) Note: 1. Sampled only, not 100% tested. Table 4B. Power-Up Timing1 for M28CxxB-W (3V range) (TA = 0 to 70 °C or -40 to 85 °C; VCC = 2.7 to 3.6 V) Note: 1. Sampled only, not 100% tested. Symbol Parameter Min. Max. Unit tPUR Time Delay to Read Operation 1 µs tPUW Time Delay to Write Operation (once VCC ≥ VWI) 10 ms VWI Write Inhibit Threshold 3.0 4.2 V Symbol Parameter Min. Max. Unit tPUR Time Delay to Read Operation 1 µs tPUW Time Delay to Write Operation (once VCC ≥ VWI)15 ms VWI Write Inhibit Threshold 1.5 2.5 V |
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