APM32E103CCT6-R datasheet(2/79 Pages) GEEHY

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Page 1

1. Product characteristics

◼

Core

–

32-bit Arm® Cortex®-M3 core

–

Up to 120MHz working frequency

◼

On-chip memory

–

Flash：512KB

–

SRAM：128KB

–

EMMC: Supports CF card, SRAM,

PSRAM, SDRAM NOR and NAND

memory

◼

Clock

–

HSECLK: 4~16MHz external

crystal/ceramic oscillator supported

–

LSECLK: 32.768KHz crystal/ceramic

oscillator supported

–

HSICLK: 8MHz RC oscillator calibrated

by factory

–

LSICLK: 40KHz RC oscillator supported

–

PLL: Phase locked loop, 2~16 times of

frequency supported

◼

Reset and power management

–

VDD range: 2.0～3.6V

–

VDDA range: 2.0～3.6V

–

VBAT range of backup domain power

supply: 1.8V～3.6V

–

Power-on/power-down reset (POR/PDR)

supported

–

Programmable power supply voltage

detector supported(PVD)

◼

Low-power mode

–

Sleep,

stop

and

standby

modes

supported

◼

DMA

–

Two DMA; DMA1 supports 7 channels

and DMA2 supports 5 channels

◼

Debugging interface

–

JTAG

–

SWD

◼

I/O

–

Up to 112 I/Os

–

All I/Os can be mapped to external

interrupt vector

–

Up to 87 FT input I/Os

◼

Communication peripherals

–

2 I2C interfaces (1Mbit/s), all of which

support SMBus/PMBus

–

3 USART, 2 UART, support ISO7816, LIN

and IrDA functions

–

3 SPI (18Mbps) interfaces, two of which

support I2S interface multiplexing

–

2 CAN, USBD and CAN can work

independently at the same time

–

1 USBD

–

1 SDIO Interface

◼

Analog peripherals

–

3 12-bit ADCs

–

2 12-bit DACs

◼

Timer

–

2 16-bit advanced timers TMR1/8 that can

provide 7 channels PWM output, support

dead zone generation and braking input

functions

–

16-bit

general-purpose

timers

TMR2/3/4/5,

each

with

independent channels to support input

capture, output comparison, PWM, pulse

count and other functions

–

2 16-bit basic timers TMR6/7

–

2 watchdog timers: one independent

watchdog

IWDT

and

one

window

watchdog WWDT

–

1 24-bit autodecrement SysTick Timer

◼

RTC

–

Support calendar and clock functions

◼

84Bytes backup register

◼

FPU

◼

CRC computing unit

◼

96-bit unique device ID

◼

Chip packaging

–

QFN48/LQFP48/LQFP64/LQFP100/LQF

P144

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