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5.7.4.

Power consumption in stop mode and standby mode

Table 30 Power Consumption in Stop Mode and Standby Mode

Parameter

Conditions

Typical value (1), (TA=25

℃)

Maximum

value (1),

(VDD=3.6V)

Unit

VDD=2.4V

VDD=3.3V

VDD=3.6V

TA=105

℃

IDDA

IDD

IDDA

IDD

IDDA

IDD

IDDA

IDD

Power

consumption

in stop

mode

Regulator in run mode,

low-speed and high-speed

internal RC oscillators and

high-speed oscillator

OFF(no independent

watchdog)

3.658

43.12

4.308

42.15

4.719

43.18

7.421

614.478

μA

Regulator in low-power

mode, low-speed and high-

speed internal RC

oscillators and high-speed

oscillator OFF(no

independent watchdog)

3.667

36.77

4.324

36.69

4.695

37.13

7.039

552.132

Power

consumption

in standby

mode

Low-speed internal RC

oscillator and independent

watchdog ON

2.911

0.47

3.85

1.01

4.342

1.31

5.937

5.468

Low-speed internal RC

oscillator on, independent

watchdog OFF

2.919

0.27

3.846

0.75

4.336

1.15

5.918

4.587

Low-speed internal RC

oscillator and independent

watchdog OFF, low-speed

oscillator and RTC OFF

2.346

0.05

2.964

0.17

3.343

0.40

4.985

4.172

Note: (1) It is obtained from a comprehensive evaluation and is not tested in production.

5.7.5.

Backup domain power consumption

Table 31 Backup Domain Power Consumption

Symbo

Conditions

Typical value (1), TA=25

℃

Maximum value (1), VBAT=3.6V

Uni

VBAT=2.0V

VBAT=2.4V

VBAT=3.3V

TA=25

℃

TA=85

℃

TA=105

℃

IDD_VBA

The low-speed

oscillator and RTC are

in ON state

1.106

1.268

1.704

1.956

2.568

3.256

μA

Note: (1) It is obtained from a comprehensive evaluation and is not tested in production.

5.7.6.

Peripheral power consumption

The HSECLK Bypass 1M is adopted as clock source, fPCLK=fHCLK=1M.

Peripheral power consumption = current that enables the peripheral clock-current that disables

the peripheral clock.

Table 32 Peripheral Power Consumption

Parameter

Peripheral

Typical value (1) TA =25℃, VDD =3.3V

Unit

AHB

DMA1

0.3

DMA2

0.34

EMMC

0.31

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