STA027 datasheet(29/44 Pages) STMICROELECTRONICS

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STA027

5 Register description

CD00066274

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5.7.3

I_AUDIO_CONFIG_1 :

Address : 0x5B (91)

Type : RW - DEC

Software Reset : 0

Description :

If INPUT_CONF == 1, this register is used to configure BSB bit clock

Table 17.

5.8

COMMAND registers description

5.8.1

SOFT_RESET :

Address : 0x10 (16)

Type : WO - DWT

Software Reset : 0

Description :

When user write 1 in this register, a soft reset occurs. The core command register and the

interrupt register are cleared. The decoder goes into idle mode.

5.8.2

CK_CMD :

Address : 0x3A (58)

Type : WO - DBO

Software Reset : 1

Hardware Reset : 1

0000000

CF0

Bit

Comment

CF0

Polarity of bit clock BS_BCK :

0 : data provided on falling edge & stable on rising edge.

1 : data provided on rising edge & stable on falling edge.

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