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STA027 数据表(PDF) 30 Page - STMicroelectronics |
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STA027 数据表(HTML) 30 Page - STMicroelectronics |
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30 / 44 page ![]() 5 Register description STA027 30/44 CD00066274 Description : After a soft reset, user must write 0 in CK_CMD to run the core clock of the chip. This will begin the boot of the chip, and so get it out of its idle state. 5.8.3 DEC_SEL : Address : 0x55 (85) Type : RW - DEC Software Reset : 0 Description : This register select the encoder/decoder data flux according the mode written in following table Table 18. . 5.8.4 RUN : Address : 0x56 (86) Type : RW - DEC Software Reset : 0 Description : – When a software reset occurs, register RUN is reset (value 0) by the dsp (see I). – When boot routines are finished, the dsp write inside RUN register the value 2 : this is the start of the external configuration period (start of DEC : see I). – When the external device wants to end the external configuration period, it must write the value 1 inside the register RUN: this is the run command that starts the decoding process (see I). b7 b6 b5 b4 b3 b2 b1 b0 Bit(7:0) Mode 10 SINE (test mode chip alive) 18 SBC decoder 19 ADC/GPSO SBC encoder 21 SDI/GPSO SBC encoder 22 ADC/SDO SBC encoder Note: available modes depends on patch code used b7 b6 b5 b4 b3 b2 b1 b0 |
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