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TL05X 数据表(PDF) 17 Page - STMicroelectronics |
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TL05X 数据表(HTML) 17 Page - STMicroelectronics |
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17 / 67 page ![]() TL05x, TL05xA ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS178A – FEBRUARY 1997 - REVISED FEBRUARY 2003 17 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PARAMETER MEASUREMENT INFORMATION VCC+ VCC– VI VO RL NOTE A: CL includes fixture capacitance. CL (see Note A) Figure 1. Slew Rate, Rise/Fall Time, and Overshoot Test Circuit Overshoot 10% 90% tr Figure 2. Rise-Time and Overshoot Waveform VCC– VCC+ VO RS RS 2 k Ω Figure 3. Noise-Voltage Test Circuit Figure 4. Unity-Gain Bandwidth and Phase-Margin Test Circuit VO VCC– VCC+ RL CL (see Note A) VI 10 k Ω 100 Ω NOTE A: CL includes fixture capacitance. typical values Typical values, as presented in this data sheet represent the median (50% point) of device parametric performance. input bias and offset current At the picoamp-bias-current level typical of the TL05x and TL05xA, accurate measurement of the bias current becomes difficult. Not only does this measurement require a picoammeter, but test-socket leakages easily can exceed the actual device bias currents. To accurately measure these small currents, Texas Instruments uses a two-step process. The socket leakage is measured using picoammeters with bias voltages applied, but with no device in the socket. The device then is inserted in the socket, and a second test that measures both the socket leakage and the device input bias current is performed. The two measurements then are subtracted algebraically to determine the bias current of the device. noise Because of the increasing emphasis on low noise levels in many of today’s applications, the input noise voltage density is sample tested at f = 1 kHz. Texas Instruments also has additional noise-testing capability to meet specific application requirements. Please contact the factory for details. Figure 5. Input-Bias and Offset-Current Test Circuit VCC+ VCC– Ground Shield pA pA |
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