AI02189

20

A0-A19

W

DQ0-DQ7

VCC

M29W008T

M29W008B

E

VSS

8

G

RP

RB

Figure 1. Logic Diagram

M29W008T

M29W008B

8 Mbit (1Mb x8, Boot Block)

Low Voltage Single Supply Flash Memory

NOT FOR NEW DESIGN

M29W008T and M29W008B are replaced

respectively by the M29W008AT and

M29W008AB

2.7V to 3.6V SUPPLY VOLTAGE for

PROGRAM, ERASE and READ OPERATIONS

FAST ACCESS TIME: 100ns

FAST PROGRAMMING TIME: 10

µs typical

PROGRAM/ERASE CONTROLLER (P/E.C.)

– Program Byte-by-Byte

– Status Register bits and Ready/Busy Output

MEMORY BLOCKS

– Boot Block (Top or Bottom location)

– Parameter and Main blocks

BLOCK, MULTI-BLOCK and CHIP ERASE

MULTI BLOCK PROTECTION/TEMPORARY

UNPROTECTION MODES

ERASE SUSPEND and RESUME MODES

– Read and Program another Block during

Erase Suspend

LOW POWER CONSUMPTION

– Stand-by and Automatic Stand-by

100,000 PROGRAM/ERASE CYCLES per

BLOCK

20 YEARS DATA RETENTION

– Defectivity below 1ppm/year

ELECTRONIC SIGNATURE

– Manufacturer Code: 20h

– Device Code, M29W008T: D2h

– Device Code, M29W008B: DCh

DESCRIPTION

The M29W008 is a non-volatile memory that may

be erased electrically at the block or chip level and

programmed in-system on a Byte-by-Byte basis

Program and Erase operations the necessary high

voltages are generated internally. The device can

also be programmed in standard programmers.

The array matrix organisation allows each block to

be erased and reprogrammed without affecting

other blocks. Blocks can be protected against pro-

graming and erase on programming equipment,

and temporarily unprotected to make changes in

June 1999

1/30

This is information on a product still in production but not recommended for new designs.

TSOP40 (N)

10 x 20 mm