M29W008B datasheet(6/30 Pages) STMICROELECTRONICS

6 / 30 page

Address Range

A19

A18

A17

A16

A15

A14

A13

00000h-0FFFFh

10000h-1FFFFh

20000h-2FFFFh

30000h-3FFFFh

40000h-4FFFFh

50000h-5FFFFh

60000h-6FFFFh

70000h-7FFFFh

80000h-8FFFFh

90000h-9FFFFh

A0000h-AFFFFh

B0000h-BFFFFh

C0000h-CFFFFh

D0000h-DFFFFh

E0000h-EFFFFh

F0000h-F7FFFh

F8000h-F9FFFh

FA000h-FBFFFh

FC000h-FFFFFh

Table 3A. M29W008T Block Address Table

Output Enable (G). The Output Enable gates the

outputs through the data buffers during a read

operation. When G is High the outputs are High

impedance. G must be forced to VID level during

Block Protection and Unprotection operations.

Write Enable (W). This input controls writing to the

Command Register and Address and Data latches.

Ready/Busy Output (RB). Ready/Busy is an

open-drain output and gives the internal state of the

P/E.C. of the device. When RB is Low, the device

is Busy with a Program or Erase operation and it

will not accept any additional program or erase

instructions except the Erase Suspend instruction.

When RB is High, the device is ready for any Read,

Program or Erase operation. The RB will also be

High when the memory is put in Erase Suspend or

Standby modes.

Reset/Block Temporary Unprotect Input (RP).

The RP Input provides hardware reset and pro-

tected block(s) temporary unprotection functions.

Reset of the memory is acheived by pulling RP to

VIL for at least tPLPX. When the reset pulse is given,

if the memory is in Read or Standby modes, it will

be available for new operations in tPHEL after the

rising edge of RP.

6/30

M29W008T, M29W008B

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