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ST7FOXF1 数据表(PDF) 21 Page - STMicroelectronics |
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ST7FOXF1 数据表(HTML) 21 Page - STMicroelectronics |
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21 / 226 page  ST7FOXF1, ST7FOXK1, ST7FOXK2 Register and memory mapping 21/226 Table 4. Hardware register map(1) Address Block Register label Register name Reset status Remarks 0000h 0001h 0002h Port A PADR PADDR PAOR Port A Data register Port A Data Direction register Port A Option register 00h 00h 00h R/W R/W R/W 0003h 0004h 0005h Port B PBDR PBDDR PBOR Port B Data register Port B Data Direction register Port B Option register 00h 00h 00h R/W R/W R/W 0006h 0007h 0008h Port C PCDR PCDDR PCOR Port C Data register Port C Data Direction register Port C Option register 00h 00h 08h R/W R/W R/W 0009h to 000Bh Reserved area (3 bytes) 000Ch 000Dh 000Eh 000Fh 0010h LITE TIMER LTCSR2 LTARR LTCNTR LTCSR1 LTICR Lite Timer Control/Status register 2 Lite Timer Auto-reload register Lite Timer Counter register Lite Timer Control/Status register 1 Lite Timer Input Capture register 0Fh 00h 00h 0x00 0000b xxh R/W R/W Read Only R/W Read Only 0011h 0012h 0013h 0014h 0015h 0016h 0017h 0018h 0019h 001Ah 001Bh 001Ch 001Dh 001Eh 001Fh 0020h 0021h 0022h 0023h 0024h 0025h 0026h 0027h 0028h 0029h 002Ah AUTO- RELOAD TIMER ATCSR CNTR1H CNTR1L ATR1H ATR1L PWMCR PWM0CSR PWM1CSR PWM2CSR PWM3CSR DCR0H DCR0L DCR1H DCR1L DCR2H DCR2L DCR3H DCR3L ATICRH ATICRL ATCSR2 BREAKCR1 ATR2H ATR2L DTGR BREAKEN Timer Control/Status register Counter register 1 High Counter register 1 Low Auto-Reload register 1 High Auto-Reload register 1 Low PWM Output Control register PWM 0 Control/Status register PWM 1 Control/Status register PWM 2 Control/Status register PWM 3 Control/Status register PWM 0 Duty Cycle register High PWM 0 Duty Cycle register Low PWM 1 Duty Cycle register High PWM 1 Duty Cycle register Low PWM 2 Duty Cycle register High PWM 2 Duty Cycle register Low PWM 3 Duty Cycle register High PWM 3 Duty Cycle register Low Input Capture register High Input Capture register Low Timer Control/Status register 2 Break Control register Auto-Reload register 2 High Auto-Reload register 2 Low Dead Time Generation register Break Enable register 0x00 0000b 00h 00h 00h 00h 00h 00h 00h 00h 00h 00h 00h 00h 00h 00h 00h 00h 00h 00h 00h 03h 00h 00h 00h 00h 03h R/W Read Only Read Only R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W Read Only Read Only R/W R/W R/W R/W R/W R/W 002Bh Reserved area (1 byte) 002Ch AUTO- RELOAD TIMER BREAKCR2 (4) Break Control register 2 (4) 00h R/W |
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