ST7FOXF1 datasheet(49/226 Pages) STMICROELECTRONICS

49 / 226 page

ST7FOXF1, ST7FOXK1, ST7FOXK2

Supply, reset and clock management

49/226

6.5.5

Prescaler register (PSCR)

Reset value: 0000 0000 (00h) for ST7FOXF1 and ST7FOXK1

Reset value: 0000 0011 (03h) for ST7FOXK2

Bits 7:5 = CK[2:0] internal RC Prescaler Selection

These bits are set by software and cleared by hardware after a reset. These bits select

the prescaler of the internal RC oscillator. See Table 11.

If the internal RC is used with a supply operating range below 3.3 V, a division ratio of

at least 2 must be enabled in the RC prescaler.

Bits 4:2 = Reserved, must be cleared.

Bits 1:0 = Must be set.

Caution:

For ST7FOXF1 and ST7FOXK1 devices, PRSC[1:0] bits must be forced to 1 by software in

order to reduce current consumption.

6.5.6

Clock controller control/status register (CKCNTCSR)

Reset value: 0000 1001 (09h)

Bits 7:4 = Reserved, must be kept cleared.

Bit 3 = AWU_FLAG AWU Selection bit

This bit is set and cleared by hardware.

0: No switch from AWU to RC requested

1: AWU clock activated and temporization completed

CK2

CK1

CK0

0 or 1

Read/write

Table 11.

Internal RC prescaler selection bits

CK2

CK1

CK0

fOSC

fRC/2

fRC/4

fRC/8

fRC/16

others

fRC

AWU_FLAG

RC_FLAG

RC/AWU

Read/write

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