STR71XF_08 datasheet(13/78 Pages) STMICROELECTRONICS

13 / 78 page

STR71xF

System architecture

13/78

Table 4.

STR710 pin description

Pin n°

Pin name

Input

Output

Main

function

(after

reset)

Alternate function

1A1

P0.10/U1.RX/

U1.TX/

SC.DATA

I/O pd

CT X 4mA T

Port 0.10

UART1:

Receive Data

input

UART1: Transmit

data output.

Note: This pin may be used for

Smartcard DataIn/DataOut or single

wire UART (half duplex) if

programmed as Alternate Function

Output. The pin will be tri-stated

except when UART transmission is in

progress

2B2

External Memory Interface: Active low read signal

for external memory. It maps to the OE_N input of

the external components.

3C2

P0.11/BOOT.1

/U1.TX

I/O pd

4mA

Port 0.11

Select Boot

Configuration

input

UART1: Transmit

data output.

P0.12/SC.CLK I/O pd

4mA

Port 0.12 Smartcard reference clock output

5D1

VSS

Ground voltage for digital I/Os4)

6D2

V33

Supply voltage for digital I/Os4)

P2.0/CS.0

I/O

8mA

Port 2.0

External Memory Interface: Select

Memory Bank 0 output

Note: This pin is forced to output

push-pull 1 mode at reset to allow

boot from external memory

P2.1/CS.1

I/O

8mA

Port 2.1

External Memory Interface: Select

Memory Bank 1 output

9D3

P0.13/U2.RX/

T2.OCMPA

I/O pu

CT X 4mA X

Port 0.13

UART2:

Receive Data

input

Timer2: Output

Compare A output

P0.14/U2.TX/

T2.ICAPA

I/O pu

4mA

Port 0.14

UART2:

Transmit data

output

Timer2: Input

Capture A input

P2.2/CS.2

I/O

8mA

Port 2.2

External Memory Interface: Select

Memory Bank 2 output

P2.3/CS.3

I/O

8mA

Port 2.3

External Memory Interface: Select

Memory Bank 3 output

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