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M34A02 数据表(PDF) 4 Page - STMicroelectronics |
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M34A02 数据表(HTML) 4 Page - STMicroelectronics |
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4 / 15 page ![]() M34A02 4/15 For correct device operation, Serial Data (SDA) must be stable before the rising edge of Serial Clock (SCL), and the data must change only after Serial Clock (SCL) is Low. Memory Addressing To start communication between the bus master and the slave device, the bus master must initiate a Start condition. Following this, the bus master sends the 8-bit byte, shown in Table 3, on Serial Data (SDA) (most significant bit first). This consists of the 7-bit Device Select code, and the Read/Write bit (RW). The Device Select Code consists of a 4-bit Device Type Identifier, and a 3-bit Chip Enable “Address” (E2, E1, E0). To address the memory array, the 4- bit Device Type Identifier is 1011b. Up to eight memory devices can be connected on a single bus. Each one is given a unique 3-bit code on Chip Enable (E0, E1, E2). When the Device Select Code is received on Serial Data (SDA), the device only responds if the Chip Select Code is the Figure 5. ACR Serial Bus Protocol SCL SDA SCL SDA SDA START Condition SDA Input SDA Change AI00792B STOP Condition 1 23 7 89 MSB ACK START Condition SCL 1 23 7 89 MSB ACK STOP Condition Table 3. Device Select Code 1 Note: 1. The most significant bit, b7, is sent first. Device Type Identifier Chip Enable RW b7 b6 b5 b4 b3 b2 b1 b0 Device Select Code 1 0 1 1 E2 E1 E0 RW |
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