AI02095

E

G

W

A0-A18

DQ0-DQ7

VALID

VALID

VCC

tVCHEL

tWHEH

tWHWL

tELWL

tAVWL

tWHGL

tWLAX

tWHDX

tAVAV

tDVWH

tWLWH

tGHWL

RB

tWHRL

Figure 7. Write AC Waveforms, W Controlled

Note: Address are latched on the falling edge of W, Data is latched on the rising edge of W.

stop when erase is completed. After completion the

Status Register bit DQ5 returns ’1’ if there has been

an Erase Failure.

Erase Suspend (ES) Instruction. The Block

Erase operation may be suspended by this instruc-

tion which consists of writing the command B0h

without any specific address. No Coded cycles are

required. It permits reading of data from another

block and programming in another block while an

erase operation is in progress. Erase suspend is

accepted only during the Block Erase instruction

execution. Writing this command during Erase

timeout will, in addition to suspending the erase,

terminate the timeout. The Toggle bit DQ6 stops

toggling when the P/E.C. is suspended. The Toggle

bits will stop toggling between 0.1

µs and 15µs after

the Erase Suspend (ES) command has been writ-

ten. The device will then automatically be set to

Read Memory Array mode. When erase is sus-

pended, a Read from blocks being erased will

output DQ2 toggling and DQ6 at ’1’. A Read from

a block not being erased returns valid data. During

suspension the memory will respond only to the

Erase Resume ER and the Program PG instruc-

tions. A Program operation can be initiated during

erase suspend in one of the blocks not being

erased. It will result in both DQ2 and DQ6 toggling

when the data is being programmed. A Read/Reset

command will definitively abort erasure and result

in invalid data in the blocks being erased.

18/30

M29W004T, M29W004B