M48Z02 datasheet(9/12 Pages) STMICROELECTRONICS

9 / 12 page

DATA RETENTION MODE

With valid VCC applied, the M48Z02/12 operates as

a conventional BYTEWIDE

™ static RAM. Should

the supply voltage decay, the RAM will automat-

ically power-fail deselect, write protecting itself

when VCC falls within the VPFD(max), VPFD(min)

window. All outputs become high impedance, and

all inputs are treated as "don’t care."

Note: A power failure during a write cycle may

corrupt data at the currently addressed location,

but does not jeopardize the rest of the RAM’s

content. At voltages below VPFD(min), the user can

be assured the memory will be in a write protected

state, provided the VCC fall time is not less than tF.

The M48Z02/12 may respond to transient noise

spikes on VCC that reach into the deselect window

during the time the device is sampling VCC. There-

fore, decoupling of the power supply lines is rec-

ommended.

The power switching circuit connects external VCC

to the RAM and disconnects the battery when VCC

rises above VSO. As VCC rises, the battery voltage

is checked. If the voltage is too low, an internal

Battery Not OK (BOK) flag will be set. The BOK flag

can be checked after power up. If the BOK flag is

set, the first write attempted will be blocked. The

flag is automatically cleared after the first write, and

normal RAM operation resumes. Figure 9 illus-

trates how a BOK check routine could be struc-

tured.

POWER SUPPLY DECOUPLING and UNDER-

SHOOT PROTECTION

ICC transients, including those produced by output

switching, can produce voltage fluctuations, result-

ing in spikes on the VCC bus. These transients can

be reduced if capacitors are used to store energy,

which stabilizes the VCC bus. The energy stored in

the bypass capacitors will be released as low going

spikes are generated or energy will be absorbed

when overshoots occur. A ceramic bypass capaci-

tor value of 0.1

µF (as shown in Figure 10) is

recommended in order to provide the needed filter-

ing.

In addition to transients that are caused by normal

SRAM operation, power cycling can generate

negative voltage spikes on VCC that drive it to

values below VSS by as much as one Volt. These

negative spikes can cause data corruption in the

SRAM while in battery backup mode. To protect

from these voltage spikes, it is recommeded to

connect a schottky diode from VCC to VSS (cathode

connected to VCC, anode to VSS). Schottky diode

1N5817 is recommended for through hole and

MBRS120T3 is recommended for surface mount.

READ DATA

AT ANY ADDRESS

AI00607

IS DATA

COMPLEMENT

OF FIRST

READ?

(BATTERY OK)

POWER-UP

YES

WRITE DATA

COMPLEMENT BACK

TO SAME ADDRESS

READ DATA

AT SAME

ADDRESS AGAIN

NOTIFY SYSTEM

OF LOW BATTERY

(DATA MAY BE

CORRUPTED)

WRITE ORIGINAL

DATA BACK TO

SAME ADDRESS

(BATTERY LOW)

CONTINUE

Figure 9. Checking the BOK Flag Status

AI02169

VCC

0.1

µF

DEVICE

VCC

VSS

Figure 10. Supply Voltage Protection

9/12

M48Z02, M48Z12

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