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M48Z02 数据表(PDF) 2 Page - STMicroelectronics

部件名 M48Z02
功能描述  16 Kbit 2Kb x 8 ZEROPOWER SRAM
PDF  12 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

M48Z02 数据表(HTML) 2 Page - STMicroelectronics

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Symbol
Parameter
Value
Unit
TA
Ambient Operating Temperature
–40 to 85
°C
TSTG
Storage Temperature (VCC Off)
–40 to 85
°C
TSLD
(2)
Lead Solder Temperature for 10 seconds
260
°C
VIO
Input or Output Voltages
–0.3 to 7
V
VCC
Supply Voltage
–0.3 to 7
V
IO
Output Current
20
mA
PD
Power Dissipation
1
W
Notes: 1. Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to the absolute maximum rating conditions for extended periods of time may
affect reliability.
2. Soldering temperature not to exceed 260
°C for 10 seconds (total thermal budget not to exceed 150°C for longer than 30 seconds).
CAUTION: Negative undershoots below –0.3 volts are not allowed on any pin while in the Battery Back-up mode.
Table 2. Absolute Maximum Ratings (1)
Mode
VCC
E
G
W
DQ0-DQ7
Power
Deselect
4.75V to 5.5V
or
4.5V to 5.5V
VIH
X
X
High Z
Standby
Write
VIL
XVIL
DIN
Active
Read
VIL
VIL
VIH
DOUT
Active
Read
VIL
VIH
VIH
High Z
Active
Deselect
VSO to VPFD (min)
X
X
X
High Z
CMOS Standby
Deselect
≤ VSO
X
X
X
High Z
Battery Back-up Mode
Notes: X = VIH or VIL; VSO = Battery Back-up Switchover Voltage.
Table 3. Operating Modes
A1
A0
DQ0
A7
A4
A3
A2
A6
A5
A10
A8
A9
DQ7
W
G
E
DQ5
DQ1
DQ2
DQ3
VSS
DQ4
DQ6
VCC
AI01187
M48Z02
M48Z12
8
1
2
3
4
5
6
7
9
10
11
12
16
15
24
23
22
21
20
19
18
17
14
13
Figure 2. DIP Pin Connections
The M48Z02/12 is a non-volatile pin and function
equivalent to any JEDEC standard 2K x 8 SRAM.
It also easily fits into many ROM, EPROM, and
EEPROM sockets, providing the non-volatility of
PROMs without any requirement for special write
timing or limitations on the number of writes that
can be performed.
The M48Z02/12 also has its own Power-fail Detect
circuit. The control circuitry constantly monitors the
single 5V supply for an out of tolerance condition.
When VCC is out of tolerance, the circuit write
protects the SRAM, providing a high degree of data
security in the midst of unpredictable system op-
eration brought on by low VCC. As VCC falls below
approximately 3V, the control circuitry connects the
battery which maintains data and clock operation
until valid power returns.
DESCRIPTION (cont’d)
2/12
M48Z02, M48Z12



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