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M48Z08 数据表(PDF) 9 Page - STMicroelectronics |
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M48Z08 数据表(HTML) 9 Page - STMicroelectronics |
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9 / 18 page ![]() DATA RETENTION MODE With valid VCC applied, the M48Z08/18 operates as a conventional BYTEWIDE ™ static RAM. Should the supply voltage decay, the RAM will automat- ically power-fail deselect, write protecting itself when VCC falls within the VPFD(max), VPFD(min) window. All outputs become high impedance, and all inputs are treated as "don’t care." Note: A power failure during a write cycle may corrupt data at the currently addressed location, but does not jeopardize the rest of the RAM’s content. At voltages below VPFD(min), the user can be assured the memory will be in a write protected state, provided the VCC fall time is not less than tF. The M48Z08/18 may respond to transient noise spikes on VCC that reach into the deselect window during the time the device is sampling VCC. There- fore, decoupling of the power supply lines is rec- ommended. When VCC drops below VSO, the control circuit switches power to the internal battery which pre- serves data and powers the clock. The internal button cell will maintain data in the M48Z08/18 for an accumulated period of at least 11 years when VCC is less than VSO. As system power returns and VCC rises above VSO, the battery is disconnected, and the power supply is switched to external VCC. Write protection continues until VCC reaches VPFD (min) plus tREC (min). E should be kept high as VCC rises past VPFD(min) to prevent inadvertent write cycles prior to system stabilization. Normal RAM operation can resume tREC after VCC exceeds VPFD(max). For more information on Battery Storage Life refer to the Application Note AN1012. SYSTEM BATTERY LIFE The useful life of the battery in the M48Z08/18 is expected to ultimately come to an end for one of two reasons: either because it has been dis- charged while providing current to the RAM in the battery back-up mode, or because the effects of aging render the cell useless before it can actually be completely discharged. The two effects are virtually unrelated, allowing discharge or Capacity Consumption, and the effects of aging or Storage Life, to be treated as two independent but simulta- neous mechanisms. The earlier occurring failure mechanism defines the battery system life of the M48Z08/18. AI01399 20 30 40 50 60 70 80 90 1 2 3 4 5 8 6 TEMPERATURE (Degrees Celsius) 10 20 30 40 50 t50% (AVERAGE) t1% Figure 9. Predicted Battery Storage Life versus Temperature 9/18 M48Z08, M48Z18 |
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