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M491B 数据表(PDF) 13 Page - STMicroelectronics |
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M491B 数据表(HTML) 13 Page - STMicroelectronics |
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13 / 16 page ![]() The volume is automatically muted for 3 seconds after the key pressure and is immediately restored at the release of the key. Tuning speeds are as follows : - FINE TUNING UP/DOWN See description of pin 4. - DIGITAL AFT ON See description of pin 17. - VOLUME UP/DOWN See description of pin 15. - MAINS ON/OFF See description of pins 25 and 26. Band Number of Tuning Steps Second Time 0 After 1 s After 2 s After 3 s VHF I VHF III UHF CATV 64 64 16 16 128 128 32 32 256 256 64 64 512 512 128 128 STORE COMMANDS 2 modes of operations are available. a)store b)memory addressing In order to protect the memory, the store function is internally disabled after one store cycle. It is enabled after a program change or a tuning operation (it is not disabled by the Digital AFT control). a) STORE. The tuning information (Tuning D/A, Fine tuning D/A and band) is stored in a previously selected memory address when this command is issued. b) MEMORY ADDRESSING. The tuning informa- tion can also be stored with this command followed by the memory position selection. When this command is accepted all the memory LEDs are blanked. Selection of the memory position initiates the store operations and restores the display. MUTE ON/OFF See description of pin 15. PIN 25 : MAINS ON OPTION INPUT If connected to VSS (GND) the Mains output is automatically switched on when VDD is applied and memory 1 is read. If it is connected to VDD the circuit goes in stand by condition. PIN 26 : MAINS ON/OFF OUTPUT Switch on of the set is controlled by the Mains on command issued for more than 0.3 s. The output transistor is set in the off condition to drive through an integrated pull-up resistor, an external NPN transistor. +5V Figure 15 At each Mains on command a memory read out occurs. AVPP (+ 25 V) is required for this operation, a 1 second delay starts when the mains output is switched off. For a correct reading of the memory the VPP supply voltage must reach the value of 25 V within 1 second after a Mains on command. In case of automatic switch on at power on caused by pin 25 at GND, the total delay is of 1.13 second (0.13s for VDD power on reset plus 1 second for mains on). The Mains on/off command, if repeated, will switch the output on (set off). The last address information is preserved until VDD is present. Next Mains on command will switch the set at the previously selected memory address and a read operation will be performed. PINS 27-28-29-30-33-34-35-36 : MEMORY ADDRESS OUTPUT These pins operate as output only for display of the selected memory location. Max drive capability is of 15 mA/1.2 V with the exception of pin 36 that is of 30 mA/1.5 V. Direct memory selection is only possible by remote control. A local memory up/down command is avail- able in case of emergency. Pin 32 must be grounded. If pin 31 is grounded, the memory position 9 to 16 are skipped in case of memory up/down com- mands. For normal operation pin 31 can be left open or, better, connected to VDD. PINS 31-32 See description of pins 27 to 30 and 33 to 36. PINS 37-38-39-40 : BAND INPUT/OUTPUT These outputs are provided to select up to 4 bands via external PNPs. If one or more bands have to be skipped, the corresponding outputs have to be short-circuited to VSS. M491B 13/16 |
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