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AM261...ZFG 数据表(PDF) 180 Page - Texas Instruments

部件名 AM261...ZFG
功能描述  AM261x Sitara™ Microcontrollers
PDF  218 Pages
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制造商  TI2 [Texas Instruments]
网页  https://www.ti.com
标志 TI2 - Texas Instruments

AM261...ZFG 数据表(HTML) 180 Page - Texas Instruments

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MII_RX_CLK
PMIR4
PMIR5
MII_RXD[3:0],
MII_RX_DV, MII_RX_ER
Figure 6-83. PRU-ICSS MII[x]_RXD[3:0], MII[x]_RX_DV, and MII[x]_RX_ER Timing
6.11.5.14.7.2.4 PRU-ICSS MII Switching Characteristics - MII[x]_TX_CLK
NO.
PARAMETER
DESCRIPTION
MODE
MIN
MAX
UNIT
PMIT1
tc(TX_CLK)
Cycle time, MII[x]_TX_CLK
10Mbps
399.96
400.04
ns
100Mbps
39.996
40.004
ns
PMIT2
tw(TX_CLKH)
Pulse duration, MII[x]_TX_CLK high
10Mbps
140
260
ns
100Mbps
14
26
ns
PMIT3
tw(TX_CLKL)
Pulse duration, MII[x]_TX_CLK low
10Mbps
140
260
ns
100Mbps
14
26
ns
MII_TX_CLK
PMIT2
PMIT3
PMIT1
Figure 6-84. PRU-ICSS MII[x]_TX_CLK Timing
6.11.5.14.7.2.5 PRU-ICSS MII Switching Characteristics - MII[x]_TXD[3:0] and MII[x]_TXEN
NO.
PARAMETER
DESCRIPTION
MODE
MIN
MAX
UNIT
PMIT4
td(TX_CLK-TXD)
Delay time, MII[x]_TX_CLK high to
MII[x]_TXD[3:0] valid
10Mbps
0
25
ns
td(TX_CLK-TX_EN)
Delay time, MII[x]_TX_CLK high to
MII[x]_TX_EN valid
0
25
ns
td(TX_CLK-TXD)
Delay time, MII[x]_TX_CLK high to
MII[x]_TXD[3:0] valid
100Mbps
0
25
ns
td(TX_CLK-TX_EN)
Delay time, MII[x]_TX_CLK high to
MII[x]_TX_EN valid
0
25
ns
PMIT4
MII_TX_CLK
MII_TXD[3:0], MII_TX_EN
Figure 6-85. PRU-ICSS MII[x]_TXD[3:0], MII[x]_TX_EN Timing
AM2612, AM2611, AM2611-Q1, AM2612-Q1
SPRSPA7C – SEPTEMBER 2024 – REVISED JULY 2025
www.ti.com
180
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Copyright © 2025 Texas Instruments Incorporated
Product Folder Links: AM2612 AM2611 AM2611-Q1 AM2612-Q1



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