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AM261...ZEJ 数据表(PDF) 150 Page - Texas Instruments |
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AM261...ZEJ 数据表(HTML) 150 Page - Texas Instruments |
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150 / 218 page  NO. PARAMETER DESCRIPTION MIN MAX UNIT SS8 tsu(CS-SPICLK) Setup time, SPI_CS[i] valid before SPI_SCLK first edge 5 ns SS9 th(SPICLK-CS) Hold time, SPI_CS[i] valid after SPI_SCLK last edge 5 ns (1) P = SPICLK period. SPI_CS[i] (IN) SPI_SCLK (IN) SPI_SCLK (IN) SPI_D[x] (IN) SPI_CS[i] (IN) SPI_SCLK (IN) SPI_SCLK (IN) SPI_D[x] (IN) Bit n-1 Bit n-2 Bit n-3 Bit n-4 Bit 0 Bit n-1 Bit n-2 Bit n-3 Bit 1 Bit 0 PHA=0 EPOL=1 POL=0 POL=1 POL=0 POL=1 PHA=1 EPOL=1 SS3 SS1 SS3 SS1 SS3 SS1 SS2 SS1 SS8 SS9 SS8 SS9 SS2 SS3 SS2 SS2 SS4 SS5 SS5 SS4 SS4 SS5 SS4 SS5 SPRSP08_TIMING_McSPI_04 Figure 6-43. SPI Peripheral Mode Receive Timing 6.11.5.11.5 SPI Peripheral Mode Switching Characteristics NO. PARAMETER DESCRIPTION MIN MAX UNIT Normal Mode SS6 td(SPICLK-SOMI) Delay time, SPI_SCLK active edge to MCSPI_SOMI transition 2 17.12 ns SS7 tsk(CS-SOMI) Delay time, SPI_CS[i] active edge to MCSPI_SOMI transition 20.95 ns AM2612, AM2611, AM2611-Q1, AM2612-Q1 SPRSPA7C – SEPTEMBER 2024 – REVISED JULY 2025 www.ti.com 150 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated Product Folder Links: AM2612 AM2611 AM2611-Q1 AM2612-Q1 |
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