AM261...ZEJ datasheet(84/218 Pages) TI2

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6 Specifications

6.1 Absolute Maximum Ratings

over operating junction temperature range (unless otherwise noted)(1) (2)

PARAMETER

MIN

MAX

UNIT

VDD

SOC VDD core supply

–0.5

1.5

VDDAR1

SRAM Array Supply 1

–0.5

1.5

VDDAR2

SRAM Array Supply 2

–0.5

1.5

VDDAR3

SRAM Array Supply 3

–0.5

1.5

VDDS18

1.8V IO Bias Supply from Bias LDO routed

through Board

–0.5

2.1

VDDS33

3.3V IO Supply

–0.5

4.0

VDDA18_OSC_PLL

1.8V Analog Supply for PLL. Routed from

the 1.8V Analog LDO out through Board

–0.5

2.1

VDDA33

Analog 3.3V Supply

–0.5

4.0

VDDA18

1.8V Analog Supply. Routed from the 1.8V

Analog LDO out through Board

–0.5

2.1

IO Pin Steady State Voltage

3.3V LVCMOS IO Buffer

–0.3

VDDS33(3) + 0.3

3.3V I2C Open-Drain IO Buffers

–0.3

VDDS33(3) + 0.3

XTAL Pad

–0.5

2.1

Transient

Overshoot and

Undershoot

All Other IO Terminals

–0.3

VDDS33(3) + 0.2 × VDDS33(3) for up

to 20% of signal period

XTAL Pad

20% of VDDA18_OSC_PLL for up to 20%

of signal period

0.2 × VDDA18_OSC_PLL

Latch Up Performance

Class II (150°C)

Latch-up I-test Performance (Current-Pulse

Injection on each IO pin)

±100(5)

Latch-up Overvoltage Performance (Voltage

Injection on each IO pin)

1.5 × VDDS33

Output current

Digital output (per pin), IOUT

–20

Storage temperature(4)

Tstg

–55

155

°C

(1)

Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply

functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions.

If used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully

functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime.

(2)

All voltage values are with respect to VSS, unless otherwise noted.

(3)

VDDS33 is the voltage on the corresponding power-supply pin(s) for the IC.

(4)

Long-term high-temperature storage or extended use at maximum temperature conditions may result in a reduction of overall device

life. For additional information, see the Semiconductor and IC Package Thermal Metrics Application Report.

(5)

The LVCMOS pins GPIO77, GPIO118, GPIO106, GPIO103, GPIO89, GPIO91, TMS can withstand Latch-up Current Pulse Injection on

each IO pin to levels of upto ±50mA.

AM2612, AM2611, AM2611-Q1, AM2612-Q1

SPRSPA7C – SEPTEMBER 2024 – REVISED JULY 2025

www.ti.com

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Product Folder Links: AM2612 AM2611 AM2611-Q1 AM2612-Q1

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