M29F200 datasheet(17/33 Pages) STMICROELECTRONICS

17 / 33 page

Symbol

Alt

Parameter

M29F200T / M29F200B

Unit

-55

-70

High Speed

Interface

Standard

Interface

Min

Max

Min

Max

tAVAV

tWC

Address Valid to Next Address Valid

tELWL

tCS

Chip Enable Low to Write Enable Low

tWLWH

tWP

Write Enable Low to Write Enable High

tDVWH

tDS

Input Valid to Write Enable High

tWHDX

tDH

Write Enable High to Input Transition

tWHEH

tCH

Write Enable High to Chip Enable High

tWHWL

tWPH

Write Enable High to Write Enable Low

tAVWL

tAS

Address Valid to Write Enable Low

tWLAX

tAH

Write Enable Low to Address Transition

tGHWL

Output Enable High to Write Enable Low

tVCHEL

tVCS

VCC High to Chip Enable Low

µs

tWHGL

tOEH

Write Enable High to Output Enable Low

tPHPHH

(1,2)

tVIDR

RP Rise Time to VID

500

tPLPX

tRP

RP Pulse Width

500

tWHRL

(1)

tBUSY Program Erase Valid to RB Delay

tPHWL

(1)

tRSP

RP High to Write Enable Low

µs

Notes: 1. Sample only, not 100% tested.

2. This timing is for Temporary Block Unprotection operation.

Table 15A. Write AC Characteristics, Write Enable Controlled

(TA = 0 to 70

°C, –40 to 85°C or –40 to 125°C)

POWER SUPPLY

Power Up

The memory Command Interface is reset on power

up to Read Array. Either E or W must be tied to VIH

during Power Up to allow maximum security and

the possibility to write a command on the first rising

edge of E and W. Any write cycle initiation is

blocked when Vcc is below VLKO.

Supply Rails

Normal precautions must be taken for supply volt-

age decoupling; each device in a system should

have the VCC rail decoupled with a 0.1

µF capacitor

close to the VCC and VSS pins. The PCB trace

widths should be sufficient to carry the VCC pro-

gram and erase currents required.

17/33

M29F200T, M29F200B

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