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APM32F103TBU7-R 数据表(PDF) 47 Page - Geehy Semiconductor Co., Ltd. |
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APM32F103TBU7-R 数据表(HTML) 47 Page - Geehy Semiconductor Co., Ltd. |
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47 / 78 page ![]() w w w. g e e h y. c o m P a g e 46 Figure 14 Bus AC Waveform and Measurement Circuit I²C总线 VDD VDD 4.7KΩ 4.7KΩ SCL SDA 重复的开始条件 开始条件 tsu(STA) tsu(STO) tsu(STO:STA) 停止条件 开始条件 th(SDA) tf(STA) SDA tr(SDA) tsu(SDA) tf(SCL) tf(SCL) tw(SCLL) SCL th(STA) tw(SCLH) MCU Note: The measuring points are set at CMOS levels: 0.3VDD and 0.7VDD. 5.11.2 SPI peripheral characteristics Table38 SPI Characteristics (TA=25℃, VDD=3.3V) Symbol Parameter Condition Minimum value Maximum value Unit fSCK 1/tc(SCK) SPI clock frequency Master Mode - 18 MHz Slave Mode - 18 tr(SCK) tf(SCK) SP clock rise and fall time Load capacitance: C = 30pF - 7.1 ns tsu(NSS)(2) NSS setup time Slave mode, fPCLK= 36MHz 111.4 - ns th(NSS)(2) NSS hold time Slave mode, fPCLK= 36MHz 55.6 - ns tw(SCKH)(2) tw(SCKL)(2) SCK high and low time Main mode, fPCLK = 36MHz, Prescaler factor=4 55.1 55.9 ns tsu(MI)(2) tsu(SI)(2) Data input setup time Master Mode 10.9 - ns Slave Mode 21.3 - th(MI)(2) th(SI)(2) Data input hold time Master Mode 35 - ns Slave Mode 25 - ta(SO)(2)(3) Data output access time Slave mode, fPCLK = 20MHz 6.5 8.7 ns Bus Start repeated Start Start Stop |
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