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AM261...ZFG 数据表(PDF) 183 Page - Texas Instruments |
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AM261...ZFG 数据表(HTML) 183 Page - Texas Instruments |
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183 / 218 page  6.11.5.17 Universal Serial Bus (USB) The USB 2.0 subsystem is compliant with the Universal Serial Bus (USB) Specification, revision 2.0. Refer to the specification for timing details. For more details about features and additional description information on the device Universal Serial Bus Subsystem (USB), see the Universal Serial Bus section in the device TRM 6.11.6 Emulation and Debug For more details about features and additional description information on the device Trace and JTAG interfaces, see the On-Chip Debug section in the device TRM. 6.11.6.1 JTAG The acronym stands for the Joint Test Action Group, the committee of engineers who defined the boundary- scan standard (IEEE std 1149.1). For more details about features and additional description information on the device JTAG interface, see the corresponding subsections within the device TRM. 6.11.6.1.1 JTAG Timing Conditions PARAMETER MIN MAX UNIT INPUT CONDITIONS SRI Input Slew Rate 0.5 2.00 V/ns OUTPUT CONDITIONS CL Output Load Capacitance 5 15 pF 6.11.6.1.2 JTAG Timing Requirements NO. PARAMETER DESCRIPTION MIN MAX UNIT J1 tc(TCK) Cycle time, TCK 40 ns J2 tw(TCKH) Pulse width, TCK high 16 ns J3 tw(TCKL) Pulse width, TCK low 16 ns J4 tsu(TDI-TCKH) Input setup time, TDI valid to TCK high 2 ns tsu(TMS-TCKH) Input setup time, TMS valid to TCK high 2 J5 th(TCK-TDI) Input hold time, TDI valid from TCK high 15.9 ns th(TCK-TMS) Input hold time, TMS valid from TCK high 15.9 6.11.6.1.3 JTAG Switching Characteristics NO. PARAMETER DESCRIPTION MIN MAX UNIT J6 td(TCKL-TDOI) Delay time, TCK low to TDO invalid –0.067005 ns J7 td(TCKL-TDOV) Delay time, TCK low to TDO valid 11.89594 ns www.ti.com AM2612, AM2611, AM2611-Q1, AM2612-Q1 SPRSPA7C – SEPTEMBER 2024 – REVISED JULY 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 183 Product Folder Links: AM2612 AM2611 AM2611-Q1 AM2612-Q1 |
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