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AM261...ZFG 数据表(PDF) 187 Page - Texas Instruments |
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AM261...ZFG 数据表(HTML) 187 Page - Texas Instruments |
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187 / 218 page  7.2 Processor Subsystems 7.2.1 Arm Cortex-R5F Subsystem The R5FSS is a dual-core implementation of the Arm® Cortex®-R5F processor configured for dual-core (split) or lockstep modes of operation. It also includes accompanying memories (L1 caches and tightly-coupled memories), standard Arm® CoreSight™ debug and trace architecture, integrated Vectored Interrupt Manager (VIM), ECC Aggregators, and various wrappers for protocol conversion and address translation for easy integration into the SoC. The device has one R5FSS module for a total possible 2x functional cores (dual-core mode) or 1x functional cores (lockstep mode). Note The Arm® Cortex®-R5F processor is a Cortex-R5 processor that includes the optional Floating-point Unit (FPU) extension. For more information, see R5FSS section in Processors and Accelerators chapter in the device TRM. www.ti.com AM2612, AM2611, AM2611-Q1, AM2612-Q1 SPRSPA7C – SEPTEMBER 2024 – REVISED JULY 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 187 Product Folder Links: AM2612 AM2611 AM2611-Q1 AM2612-Q1 |
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