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AM261...ZFG 数据表(PDF) 189 Page - Texas Instruments |
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AM261...ZFG 数据表(HTML) 189 Page - Texas Instruments |
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189 / 218 page  8.2 OSPI Reset For proper OSPI boot operation in AM261x system designs, it is recommended that the OSPI flash reset signal is generated from the output of an AND gate with PORz/WARMRSTn and OSPI0_RESET_OUT0 as inputs. This method allows the flash device to be reset when the AM261x device is power cycled or through a software reset command. During OSPI boot, the AM261x device boot ROM code configures the GPIO61 pin as OSPI0_RESET_OUT0 and drives the pin low to reset an external flash device. However, the OSPI controller configuration for GPIO61 does not drive the pin high once the flash device has been reset, thus holding the flash device in reset, preventing proper boot. This includes fallback modes of boot which will result in OSPI boot mode getting activated. For more information, refer to the AM261x Errata Document. For software reset of the external flash device, any GPIO with a dedicated OSPI0_RESET_OUT mux mode can be used, including GPIO61. However, due to the ROM code configuration outlined above, the GPIO61 pin should be gated to prevent signal propagation to the reset logic on boot. AM261x OSPI Reset using Buffered GPIO61 and PORz/WARMRESETn showcases one application of this. For more details on design considerations, please see the AM26x Hardware Design Guide. Note Regardless of the GPIO pin used for OSPI0_RESET_OUT0 implementation, it is still recommended that the OSPI flash reset signal is generated from the output of an AND gate with PORz/WARMRSTn and OSPI0_RESET_OUT0 as inputs, such as in AM261x OSPI Reset using OSPI0_REST_OUT0 and PORz/WARMRESETn. AM261x OSPI0_RESET_OUT0 PORz/WARMRSTn GND 10kΩ 10kΩ OSPI IO Voltage OSPI IO Voltage 10kΩ OSPI Flash RESETn Figure 8-1. AM261x OSPI Reset using OSPI0_REST_OUT0 and PORz/WARMRESETn AM261x GPIO61 (OSPI0_RESET_OUT0) PORz/WARMRSTn GND 10kΩ OSPI IO Voltage 10kΩ OSPI Flash RESETn 10kΩ GND GPIOx OSPI IO Voltage 10kΩ A B OE Figure 8-2. AM261x OSPI Reset using Buffered GPIO61 and PORz/WARMRESETn www.ti.com AM2612, AM2611, AM2611-Q1, AM2612-Q1 SPRSPA7C – SEPTEMBER 2024 – REVISED JULY 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 189 Product Folder Links: AM2612 AM2611 AM2611-Q1 AM2612-Q1 |
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