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AS1181 数据表(PDF) 21 Page - ams-OSRAM AG |
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AS1181 数据表(HTML) 21 Page - ams-OSRAM AG |
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21 / 92 page  AS1181 Functional description Datasheet • PUBLIC • Document Feedback DS001139 • v3-00 • 2026-Apr-01 21 / 92 / 7.1.3 Illumination sequence & STROBE mode The illumination sequence always starts in IDLE state when a strobe is asserted. The strobe will enter state “TRIGGERED” depending on the strobe delay defined in CH_DLY register (Address 0x1A24) bit “TD_TRIGDLY”. The minimum trigger delay time is 45µs. The state ILLUM lasts from the first channel that is turned on to the last channel that is turned off. In STROBE mode the illumination duration is defined internally by the TD_ILLUM register (Address 0x1A00). Figure 20: Illumination sequence 7.1.3.1 Stagger delay Stagger delay is controlled by CH_DLY register (Address 0x1A24) bit “TD_STAGGER” and allows to add a delay before the next channel group is turned on/off. Information: • A group can contain 1 or more channels. |
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