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AS7038RB 数据表(PDF) 120 Page - ams-OSRAM AG |
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AS7038RB 数据表(HTML) 120 Page - ams-OSRAM AG |
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120 / 127 page ![]() Document Feedback AS7038RB Functional Description Datasheet • PUBLIC DS000726 • v2-00 • 2021-Jun-02 126 │ 119 Addr: 0xa8 INTENAB Bit Bit Name Default Access Bit Description 1 irq_sequencer_enab 0 RW 1: Enable irq_sequencer as an interrupt source 0 irq_adc_enab 0 RW 1: Enable irq_adc as an interrupt source Each of the STATUS register bits can cause an interrupt (register INTR) if the respective bit is asserted in the INTENAB register INTENAB2 (Address 0xa9) Figure 167: INTENAB2 Register Addr: 0xa9 INTENAB2 Bit Bit Name Default Access Bit Description 7:3 Not used 0 RW Not used 2 irq_ltf1_threshold_enab 0 RW 1: enableltf_treshold_high or ltf_treshold_low in ltf1 as interrupt source 1 irq_ltf0_threshold_enab 0 RW 1: enableltf_treshold_high or ltf_treshold_low in ltf0 as interrupt source 0 irq_ecg_threshold_enab 0 RW 1: enableecg_treshold_high or ecg_treshold_low as interrupt source INTR (Address 0xaa) Figure 168: INTR Register Addr: 0xaa INTR Bit Bit Name Default Access Bit Description 7 irq_led_supply_low_intr 0 RO 6 irq_clipdetect_intr 0 RO 5 irq_fifooverflow_intr 0 RO 4 irq_fifothreshold_intr 0 RO |
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