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db12348e_V3.11_preliminary_2017-07-06

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AS89010

V3.11

Figure 13: An example of configuration and measurement I²C sequences

S

1 1 1 0 1 A1 A0

0

A

A

CREGL

A

slave address

address CREGL

write CREGL

06h

CREGH

A

write CREGH

OPTREG

A

write OPTREG

BREAK

A

write BREAK

EDGES

A

write EDGES

P

. . .

cont.

. . .

cont.

write control register:

S

1 1 1 0 1 A1 A0

0

A

00h

A SS PD 0 0 0 0 1 1 A

slave address

OSR address

write OSR: meas. mode

go to measurement mode:

Figure 14 shows I²C sequence for starting a conversion in CMD or CONT Mode by setting the SS bit to '1'.

The two last bits of the OSR register could also be set to ‘00’ if the device is already in the measurement

mode.

Figure 14: Start conversion in CMD or CONT Mode

S

1 1 1 0 1 A1 A0

0

A

00h

A

1 PD 0 0 0 0 1 1

A

slave address

OSR address

write OSR: meas. mode

start single conversion in CMD mode, initialise conversion in CONT mode

S

1 1 1 0 1 A1 A0

0

A

A

CREGL

A

slave address

address CREGL

read CREGL

06h

CREGH

A

read CREGH

OPTREG

A

read OPTREG

BREAK

A

read BREAK

EDGES

NA

read EDGES

P

. . .

cont.

. . .

cont.

read control register:

Sr

1 1 1 0 1 A1 A0

slave address

1

A

S

1 1 1 0 1 A1 A0

0

A

A

OUT0[7:0]

A

slave address

address OUT0 register

read OUT0 low byte

00h

OUT0[15:8]

A

OUT1[7:0]

A

OUT1[15:8]

A

OUT3[15:8]

NA P

. . .

cont.

. . .

cont.

read conversion data:

Sr

1 1 1 0 1 A1 A0

slave address

1

read OUT0 high byte read OUT1 low byte read OUT1 high byte

. . .

read OUT3 high byte

A

data transfered from slave to master

data transfered from master to slave

A:

acknowledge

NA: not acknowledge

S: start cond.

Sr: repeated start cond.

P: stop cond.

S

1 1 1 0 1 A1 A0

0

A

00h

A

X PD 0 0 0 0 1 0

A

slave address

OSR address

write OSR: config. mode

go to configuration mode: