RZSLASHG2L datasheet(9/74 Pages) RENESAS

9 / 74 page

RZ/G2L Group, RZ/G2LC Group

1. Overview

R01DS0484EJ0110

Rev.1.10

Page 9 of 74

May 30, 2025

1.1.11

Timer

Item

Description

Multi-function Timer Pulse Unit 3

(MTU3a)

[RZ/G2L]

● 9 channels (16 bits × 8 channels, 32 bits × 1 channel)

[RZ/G2LC]

● 8 channels (16 bits × 7 channels, 32 bits × 1 channel)

[RZ/G2L RZ/G2LC]

● Module clock frequency (P0ϕ): 100 MHz

● Maximum 28 lines of pulse inputs/outputs and 3 lines of pulse inputs

● 14 types of count clocks selectable

● Input capture function

● 39 outputs compare and input capture registers

● Counter clear operation (Simultaneous counter clearing by Compare match or Input capture is

available)

● Simultaneous writing to multiple timer counters (TCNT)

● Synchronous input/output of each register due to synchronous operation of the counter

● Buffered operation

● Cascade-connected operation

● 43 types of interrupt sources

● Automatic transfer of register data

● Pulse output modes

Toggle, PWM, complementary PWM, and reset-synchronized PWM modes

● Synchronization of multiple counters

● Phase counting mode

– 16-bit mode (channel 1 and 2)

– 32-bit mode (channel 1 and 2)

● Counter function of dead time compensation

● Digital filter functions for the input capture and external count clock pin

Port Output Enable 3

(POE3)

[RZ/G2L RZ/G2LC]

● Control of the high-impedance state of the MTU3a waveform output pins

● Activation with four input pins

● Activation on detection of short-circuited outputs (detection of simultaneous PWM output to the

active level)

● Activation by register write

● Additional programming of output control target pins is possible.

RZ/G2L 数据表(PDF) 9 Page - Renesas Technology Corp

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