M9346-RBN3T datasheet(10/34 Pages) STMICROELECTRONICS

10 / 34 page

M93S66, M93S56, M93S46

10/34

Figure 5. PAWRITE and WRAL Sequence

Note: For the meanings of An, Xn and Dn, please see Table 2. and Table 3..

Page Write

A Page Write to Memory (PAWRITE) instruction

contains the first address to be written, followed by

up to 4 data words.

After the receipt of each data word, bits A1-A0 of

the internal address register are incremented, the

high order bits remaining unchanged (A7-A2 for

M93S66, M93S56; A5-A2 for M93S46). Users

must take care, in the software, to ensure that the

last word address has the same upper order ad-

dress bits as the initial address transmitted to

avoid address roll-over.

The Page Write to Memory (PAWRITE) instruction

will not be executed if any of the 4 words address-

es the protected area.

Write Enable (W) must be held High before and

during the instruction. Input address and data, on

Serial Data Input (D) are sampled on the rising

edge of Serial Clock (C).

After the last data bit has been sampled, the Chip

Select Input (S) must be taken Low before the next

rising edge of Serial Clock (C). If Chip Select Input

(S) is brought Low before or after this specific time

frame, the self-timed programming cycle will not

AI00890C

PAGE

WRITE

1 1An

DATA IN

CODE

BUSY

READY

CHECK

STATUS

ADDR

PRE

WRITE

ALL

1 0Xn X0

DATA IN

CODE

BUSY

READY

CHECK

STATUS

ADDR

PRE

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