M95010-RBN3G datasheet(19/37 Pages) STMICROELECTRONICS

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M95010-RBN3G 数据表(PDF) 19 Page - STMicroelectronics

部件名	M95010-RBN3G

功能描述	4Kbit, 2Kbit and 1Kbit Serial SPI Bus EEPROM With High Speed Clock

PDF	37 Pages

Scroll/Zoom	100%

制造商	STMICROELECTRONICS [STMicroelectronics]

网页	http://www.st.com

标志

19 / 37 page

19/37

M95040, M95020, M95010

POWER-UP AND DELIVERY STATE

Power-up State

After Power-up, the device is in the following state:

–

low power Standby Power mode

–

deselected (after Power-up, a falling edge is

required on Chip Select (S) before any

instructions can be started).

–

not in the Hold Condition

–

the Write Enable Latch (WEL) is reset to 0

–

Write In Progress (WIP) is reset to 0

The BP1 and BP0 bits of the Status Register are

unchanged from the previous power-down (they

are non-volatile bits).

Initial Delivery State

The device is delivered with the memory array set

at all 1s (FFh). The Block Protect (BP1 and BP0)

bits are initialized to 0.

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