ST24LC21B datasheet(17/22 Pages) STMICROELECTRONICS

17 / 22 page

AI01749

VSync

100nF

47k

Ω

+5V

SCL

SDA

+5V Monitor

VCLK

SCL

SDA

VSS

VCC

MONITOR

HOST

VGA Cable

Figure 13. Recommended Schematic for VESA 2.0 Specification

low during this time, the ST24xy21 terminate the

data transfer and switches to a standby state.

NOTE CONCERNING THE POWER SUPPLY

VOLTAGE IN THE VESA 2.0 SPECIFICATION

According to the VESA 2.0 specification, the

ST24xy21 can be supplied by either the MONITOR

or by the HOST (using +5V on the VGA cable pin

9) power supply. The easyest way to implement this

is to use 2 diodes as described in the following

schematic. The ST24xy21 supply voltage will be

decreased by 0.6V, which is the diode forward

voltage drop, and will be below 4.5V. Nevertheless,

the ST24xy21 remains operational and no input will

be damaged if the applied voltage on any input

complies with the Absolute Maximum Ratings val-

ues.

Under this condition, the threshold voltage of the

Schmitt-Trigger (pin 7) will be decreased (as in

Table 6).

17/22

ST24LC21B, ST24LW21, ST24FC21, ST24FC21B, ST24FW21

ST24LC21B 数据表(PDF) 17 Page - STMicroelectronics

ST24LC21B 数据表(HTML) 17 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22

数据表下载