Symbol

Parameter

Value

Unit

Ambient Operating Temperature

–40 to 85

°C

Storage Temperature

–65 to 150

°C

Lead Temperature, Soldering

(SO8 package)

(PSDIP8 package)

40 sec

10 sec

215

260

°C

Input or Output Voltages

–0.3 to 6.5

V

Supply Voltage

–0.3 to 6.5

V

Electrostatic Discharge Voltage (Human Body model)

(2)

4000

V

Electrostatic Discharge Voltage (Machine model)

(3)

500

V

Notes: 1. Except for the rating "Operating Temperature Range", stresses above those listed in the Table "Absolute Maximum Ratings"

may cause permanent damage to the device. These are stress ratings only and operation of thedevice at these or any other

conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum

Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other

relevant quality documents.

2. MIL-STD-883C, 3015.7 (100pF, 1500

Ω).

3. EIAJ IC-121 (Condition C) (200pF, 0

Ω).

Device Code

Chip Enable

RW

Bit

b7

b6

b5

b4

b3

b2

b1

b0

Device Select

1

0

1

0

X

X

X

RW

Note: The MSB b7 is sent first.

X = 0 or 1.

Table 3A. Device Select Code (ST24LC21B, ST24LW21, ST24FC21 and ST24FW21)

The ST24xy21 can operate in two modes: Trans-

powered, the device is in Transmit-Only mode with

EEPROM data clocked out from the rising edge of

the signal applied on VCLK.

upon the falling edge of the signal applied on SCL

ST24LW21) cannot switch back to the Transmit

Only mode (except when the power supply is re-

moved). For the ST24FC21, ST24FC21B (or the

ST24FW21), after the falling edge of SCL, the

memory enter in a transition state which allowed to

switch back to the Transmit-Only mode if no valid

and Plastic Small Outline packages are available.

Transmit Only Mode

After a Power-up, the ST24xy21 is in the Transmit

Only mode. A proper initialization sequence (see

Figure 3) must supply nine clock pulses on the

VCLK pin (in order to internally synchronize the

device). During this initialization sequence, the

SDA pin is in high impedance. On the rising edge

of the tenth pulse applied on VCLK pin, the device

will output the first bit of byte located at address 00h

(most significant bit first).

DESCRIPTION (cont’d)

Device Code

Chip Enable

RW

Bit

b7

b6

b5

b4

b3

b2

b1

b0

Device Select

1

010000

RW

Note: The MSB b7 is sent first.

X = 0 or 1.

Table 3B. Device Select Code (ST24FC21B)

3/22

ST24LC21B, ST24LW21, ST24FC21, ST24FC21B, ST24FW21